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irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices

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Allocating a minimum of 32 LPIs per PCI device, let's reduce it to
be just 1, as most devices do not need that many interrupts.

We still have to special-case DevID 0, as there is plenty of broken
HW around where the PCI RID is not presented as a DevID to the ITS,
and all the devices are presented as DevID 0. In this case, we keep
the 32 minimal allocation.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Marc Zyngier 2018-05-31 16:21:43 +01:00
parent 12b2905af1
commit 30800b3a1f
1 changed files with 11 additions and 3 deletions
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14
drivers/irqchip/irq-gic-v3-its-pci-msi.c
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@ -66,7 +66,7 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
{
struct pci_dev *pdev, *alias_dev;
struct msi_domain_info *msi_info;
int alias_count = 0;
int alias_count = 0, minnvec = 1;
if (!dev_is_pci(dev))
return -EINVAL;
@ -86,9 +86,17 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
/* ITS specific DeviceID, as the core ITS ignores dev. */
info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev);
/* Allocate at least 32 MSIs, and always as a power of 2 */
/*
* Always allocate a power of 2, and special case device 0 for
* broken systems where the DevID is not wired (and all devices
* appear as DevID 0). For that reason, we generously allocate a
* minimum of 32 MSIs for DevID 0. If you want more because all
* your devices are aliasing to DevID 0, consider fixing your HW.
*/
nvec = max(nvec, alias_count);
nvec = max_t(int, 32, roundup_pow_of_two(nvec));
if (!info->scratchpad[0].ul)
minnvec = 32;
nvec = max_t(int, minnvec, roundup_pow_of_two(nvec));
return msi_info->ops->msi_prepare(domain->parent, dev, nvec, info);
}