forked from luck/tmp_suning_uos_patched
x86/amd-iommu: Move some pte allocation functions in the right section
This patch moves alloc_pte() and fetch_pte() into the page table handling code section so that the forward declarations for them could be removed. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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87a64d5238
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@ -59,15 +59,10 @@ struct iommu_cmd {
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static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
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struct unity_map_entry *e);
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static u64 *alloc_pte(struct protection_domain *domain,
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unsigned long address, int end_lvl,
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u64 **pte_page, gfp_t gfp);
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static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
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unsigned long start_page,
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unsigned int pages);
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static void reset_iommu_command_buffer(struct amd_iommu *iommu);
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static u64 *fetch_pte(struct protection_domain *domain,
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unsigned long address, int map_size);
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static void update_domain(struct protection_domain *domain);
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/****************************************************************************
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@ -664,6 +659,100 @@ void amd_iommu_flush_all_devices(void)
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*
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****************************************************************************/
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/*
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* This function is used to add another level to an IO page table. Adding
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* another level increases the size of the address space by 9 bits to a size up
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* to 64 bits.
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*/
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static bool increase_address_space(struct protection_domain *domain,
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gfp_t gfp)
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{
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u64 *pte;
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if (domain->mode == PAGE_MODE_6_LEVEL)
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/* address space already 64 bit large */
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return false;
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pte = (void *)get_zeroed_page(gfp);
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if (!pte)
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return false;
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*pte = PM_LEVEL_PDE(domain->mode,
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virt_to_phys(domain->pt_root));
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domain->pt_root = pte;
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domain->mode += 1;
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domain->updated = true;
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return true;
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}
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static u64 *alloc_pte(struct protection_domain *domain,
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unsigned long address,
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int end_lvl,
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u64 **pte_page,
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gfp_t gfp)
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{
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u64 *pte, *page;
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int level;
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while (address > PM_LEVEL_SIZE(domain->mode))
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increase_address_space(domain, gfp);
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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while (level > end_lvl) {
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if (!IOMMU_PTE_PRESENT(*pte)) {
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page = (u64 *)get_zeroed_page(gfp);
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if (!page)
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return NULL;
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*pte = PM_LEVEL_PDE(level, virt_to_phys(page));
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}
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level -= 1;
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pte = IOMMU_PTE_PAGE(*pte);
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if (pte_page && level == end_lvl)
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*pte_page = pte;
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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}
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return pte;
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}
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/*
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* This function checks if there is a PTE for a given dma address. If
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* there is one, it returns the pointer to it.
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*/
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static u64 *fetch_pte(struct protection_domain *domain,
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unsigned long address, int map_size)
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{
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int level;
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u64 *pte;
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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while (level > map_size) {
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if (!IOMMU_PTE_PRESENT(*pte))
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return NULL;
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level -= 1;
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pte = IOMMU_PTE_PAGE(*pte);
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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if ((PM_PTE_LEVEL(*pte) == 0) && level != map_size) {
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pte = NULL;
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break;
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}
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}
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return pte;
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}
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/*
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* Generic mapping functions. It maps a physical address into a DMA
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* address space. It allocates the page table pages if necessary.
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@ -819,37 +908,6 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
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* called with domain->lock held
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*/
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/*
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* This function checks if there is a PTE for a given dma address. If
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* there is one, it returns the pointer to it.
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*/
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static u64 *fetch_pte(struct protection_domain *domain,
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unsigned long address, int map_size)
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{
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int level;
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u64 *pte;
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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while (level > map_size) {
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if (!IOMMU_PTE_PRESENT(*pte))
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return NULL;
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level -= 1;
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pte = IOMMU_PTE_PAGE(*pte);
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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if ((PM_PTE_LEVEL(*pte) == 0) && level != map_size) {
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pte = NULL;
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break;
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}
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}
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return pte;
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}
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/*
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* This function is used to add a new aperture range to an existing
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* aperture in case of dma_ops domain allocation or address allocation
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@ -1534,69 +1592,6 @@ static void update_domain(struct protection_domain *domain)
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domain->updated = false;
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}
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/*
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* This function is used to add another level to an IO page table. Adding
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* another level increases the size of the address space by 9 bits to a size up
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* to 64 bits.
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*/
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static bool increase_address_space(struct protection_domain *domain,
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gfp_t gfp)
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{
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u64 *pte;
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if (domain->mode == PAGE_MODE_6_LEVEL)
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/* address space already 64 bit large */
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return false;
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pte = (void *)get_zeroed_page(gfp);
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if (!pte)
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return false;
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*pte = PM_LEVEL_PDE(domain->mode,
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virt_to_phys(domain->pt_root));
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domain->pt_root = pte;
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domain->mode += 1;
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domain->updated = true;
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return true;
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}
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static u64 *alloc_pte(struct protection_domain *domain,
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unsigned long address,
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int end_lvl,
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u64 **pte_page,
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gfp_t gfp)
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{
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u64 *pte, *page;
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int level;
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while (address > PM_LEVEL_SIZE(domain->mode))
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increase_address_space(domain, gfp);
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level = domain->mode - 1;
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pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
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while (level > end_lvl) {
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if (!IOMMU_PTE_PRESENT(*pte)) {
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page = (u64 *)get_zeroed_page(gfp);
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if (!page)
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return NULL;
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*pte = PM_LEVEL_PDE(level, virt_to_phys(page));
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}
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level -= 1;
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pte = IOMMU_PTE_PAGE(*pte);
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if (pte_page && level == end_lvl)
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*pte_page = pte;
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pte = &pte[PM_LEVEL_INDEX(level, address)];
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}
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return pte;
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}
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/*
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* This function fetches the PTE for a given address in the aperture
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*/
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