forked from luck/tmp_suning_uos_patched
net: ipa: fix register write command validation
[ Upstream commit 2d65ed76924bc772d3974b0894d870b1aa63b34a ] In ipa_cmd_register_write_valid() we verify that values we will supply to a REGISTER_WRITE IPA immediate command will fit in the fields that need to hold them. This patch fixes some issues in that function and ipa_cmd_register_write_offset_valid(). The dev_err() call in ipa_cmd_register_write_offset_valid() has some printf format errors: - The name of the register (corresponding to the string format specifier) was not supplied. - The IPA base offset and offset need to be supplied separately to match the other format specifiers. Also make the ~0 constant used there to compute the maximum supported offset value explicitly unsigned. There are two other issues in ipa_cmd_register_write_valid(): - There's no need to check the hash flush register for platforms (like IPA v4.2) that do not support hashed tables - The highest possible endpoint number, whose status register offset is computed, is COUNT - 1, not COUNT. Fix these problems, and add some additional commentary. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2019-2020 Linaro Ltd.
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* Copyright (C) 2019-2021 Linaro Ltd.
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*/
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#include <linux/types.h>
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@ -244,11 +244,15 @@ static bool ipa_cmd_register_write_offset_valid(struct ipa *ipa,
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if (ipa->version != IPA_VERSION_3_5_1)
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bit_count += hweight32(REGISTER_WRITE_FLAGS_OFFSET_HIGH_FMASK);
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BUILD_BUG_ON(bit_count > 32);
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offset_max = ~0 >> (32 - bit_count);
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offset_max = ~0U >> (32 - bit_count);
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/* Make sure the offset can be represented by the field(s)
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* that holds it. Also make sure the offset is not outside
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* the overall IPA memory range.
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*/
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if (offset > offset_max || ipa->mem_offset > offset_max - offset) {
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dev_err(dev, "%s offset too large 0x%04x + 0x%04x > 0x%04x)\n",
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ipa->mem_offset + offset, offset_max);
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name, ipa->mem_offset, offset, offset_max);
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return false;
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}
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@ -261,12 +265,24 @@ static bool ipa_cmd_register_write_valid(struct ipa *ipa)
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const char *name;
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u32 offset;
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offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version);
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name = "filter/route hash flush";
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if (!ipa_cmd_register_write_offset_valid(ipa, name, offset))
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return false;
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/* If hashed tables are supported, ensure the hash flush register
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* offset will fit in a register write IPA immediate command.
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*/
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if (ipa->version != IPA_VERSION_4_2) {
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offset = ipa_reg_filt_rout_hash_flush_offset(ipa->version);
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name = "filter/route hash flush";
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if (!ipa_cmd_register_write_offset_valid(ipa, name, offset))
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return false;
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}
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offset = IPA_REG_ENDP_STATUS_N_OFFSET(IPA_ENDPOINT_COUNT);
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/* Each endpoint can have a status endpoint associated with it,
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* and this is recorded in an endpoint register. If the modem
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* crashes, we reset the status endpoint for all modem endpoints
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* using a register write IPA immediate command. Make sure the
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* worst case (highest endpoint number) offset of that endpoint
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* fits in the register write command field(s) that must hold it.
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*/
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offset = IPA_REG_ENDP_STATUS_N_OFFSET(IPA_ENDPOINT_COUNT - 1);
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name = "maximal endpoint status";
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if (!ipa_cmd_register_write_offset_valid(ipa, name, offset))
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return false;
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