forked from luck/tmp_suning_uos_patched
smc91x: enable ethtool EEPROM interface
Signed-off-by: Vernon Sauder <vsauder@inhand.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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31e2b7bd21
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357fe2c6d2
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@ -1643,6 +1643,117 @@ static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
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lp->msg_enable = level;
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}
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static int smc_write_eeprom_word(struct net_device *dev, u16 addr, u16 word)
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{
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u16 ctl;
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struct smc_local *lp = netdev_priv(dev);
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void __iomem *ioaddr = lp->base;
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spin_lock_irq(&lp->lock);
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/* load word into GP register */
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SMC_SELECT_BANK(lp, 1);
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SMC_SET_GP(lp, word);
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/* set the address to put the data in EEPROM */
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SMC_SELECT_BANK(lp, 2);
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SMC_SET_PTR(lp, addr);
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/* tell it to write */
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SMC_SELECT_BANK(lp, 1);
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ctl = SMC_GET_CTL(lp);
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SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
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/* wait for it to finish */
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do {
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udelay(1);
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} while (SMC_GET_CTL(lp) & CTL_STORE);
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/* clean up */
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SMC_SET_CTL(lp, ctl);
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SMC_SELECT_BANK(lp, 2);
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spin_unlock_irq(&lp->lock);
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return 0;
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}
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static int smc_read_eeprom_word(struct net_device *dev, u16 addr, u16 *word)
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{
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u16 ctl;
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struct smc_local *lp = netdev_priv(dev);
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void __iomem *ioaddr = lp->base;
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spin_lock_irq(&lp->lock);
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/* set the EEPROM address to get the data from */
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SMC_SELECT_BANK(lp, 2);
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SMC_SET_PTR(lp, addr | PTR_READ);
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/* tell it to load */
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SMC_SELECT_BANK(lp, 1);
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SMC_SET_GP(lp, 0xffff); /* init to known */
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ctl = SMC_GET_CTL(lp);
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SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
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/* wait for it to finish */
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do {
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udelay(1);
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} while (SMC_GET_CTL(lp) & CTL_RELOAD);
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/* read word from GP register */
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*word = SMC_GET_GP(lp);
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/* clean up */
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SMC_SET_CTL(lp, ctl);
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SMC_SELECT_BANK(lp, 2);
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spin_unlock_irq(&lp->lock);
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return 0;
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}
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static int smc_ethtool_geteeprom_len(struct net_device *dev)
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{
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return 0x23 * 2;
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}
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static int smc_ethtool_geteeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int i;
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int imax;
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DBG(1, "Reading %d bytes at %d(0x%x)\n",
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eeprom->len, eeprom->offset, eeprom->offset);
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imax = smc_ethtool_geteeprom_len(dev);
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for (i = 0; i < eeprom->len; i += 2) {
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int ret;
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u16 wbuf;
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int offset = i + eeprom->offset;
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if (offset > imax)
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break;
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ret = smc_read_eeprom_word(dev, offset >> 1, &wbuf);
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if (ret != 0)
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return ret;
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DBG(2, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);
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data[i] = (wbuf >> 8) & 0xff;
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data[i+1] = wbuf & 0xff;
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}
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return 0;
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}
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static int smc_ethtool_seteeprom(struct net_device *dev,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int i;
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int imax;
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DBG(1, "Writing %d bytes to %d(0x%x)\n",
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eeprom->len, eeprom->offset, eeprom->offset);
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imax = smc_ethtool_geteeprom_len(dev);
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for (i = 0; i < eeprom->len; i += 2) {
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int ret;
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u16 wbuf;
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int offset = i + eeprom->offset;
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if (offset > imax)
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break;
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wbuf = (data[i] << 8) | data[i + 1];
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DBG(2, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);
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ret = smc_write_eeprom_word(dev, offset >> 1, wbuf);
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if (ret != 0)
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return ret;
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}
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return 0;
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}
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static const struct ethtool_ops smc_ethtool_ops = {
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.get_settings = smc_ethtool_getsettings,
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.set_settings = smc_ethtool_setsettings,
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@ -1652,8 +1763,9 @@ static const struct ethtool_ops smc_ethtool_ops = {
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.set_msglevel = smc_ethtool_setmsglevel,
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.nway_reset = smc_ethtool_nwayreset,
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.get_link = ethtool_op_get_link,
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// .get_eeprom = smc_ethtool_geteeprom,
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// .set_eeprom = smc_ethtool_seteeprom,
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.get_eeprom_len = smc_ethtool_geteeprom_len,
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.get_eeprom = smc_ethtool_geteeprom,
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.set_eeprom = smc_ethtool_seteeprom,
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};
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/*
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@ -1141,6 +1141,16 @@ static const char * chip_ids[ 16 ] = {
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#define SMC_GET_MII(lp) SMC_inw(ioaddr, MII_REG(lp))
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#define SMC_GET_GP(lp) SMC_inw(ioaddr, GP_REG(lp))
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#define SMC_SET_GP(lp, x) \
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do { \
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if (SMC_MUST_ALIGN_WRITE(lp)) \
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SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 1)); \
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else \
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SMC_outw(x, ioaddr, GP_REG(lp)); \
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} while (0)
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#define SMC_SET_MII(lp, x) SMC_outw(x, ioaddr, MII_REG(lp))
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#define SMC_GET_MIR(lp) SMC_inw(ioaddr, MIR_REG(lp))
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