forked from luck/tmp_suning_uos_patched
dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function.
Removing this function allows moving 'ccr_to_device' and 'ccr_from_device' from internal struct to channel struct. This repesents a step forward towards removing auxiliary 'internal' structure. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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bdc0c7534c
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359291a1a0
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@ -134,9 +134,6 @@ struct imxdma_channel_internal {
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int in_use;
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u32 ccr_from_device;
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u32 ccr_to_device;
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struct timer_list watchdog;
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int hw_chaining;
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@ -182,6 +179,8 @@ struct imxdma_channel {
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enum dma_status status;
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int dma_request;
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struct scatterlist *sg_list;
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u32 ccr_from_device;
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u32 ccr_to_device;
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};
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struct imxdma_engine {
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@ -313,58 +312,6 @@ static void imxdma_disable_hw(struct imxdma_channel *imxdmac)
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local_irq_restore(flags);
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}
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static int
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imxdma_setup_sg_hw(struct imxdma_desc *d,
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struct scatterlist *sg, unsigned int sgcount,
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unsigned int dma_length, unsigned int dev_addr,
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enum dma_transfer_direction direction)
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{
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struct imxdma_channel *imxdmac = to_imxdma_chan(d->desc.chan);
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int channel = imxdmac->channel;
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if (imxdmac->internal.in_use)
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return -EBUSY;
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imxdmac->internal.sg = sg;
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imxdmac->internal.resbytes = dma_length;
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if (!sg || !sgcount) {
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printk(KERN_ERR "imxdma%d: imx_dma_setup_sg empty sg list\n",
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channel);
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return -EINVAL;
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}
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if (!sg->length) {
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printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n",
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channel);
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return -EINVAL;
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}
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if (direction == DMA_DEV_TO_MEM) {
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pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
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"dev_addr=0x%08x for read\n",
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channel, __func__, sg, sgcount, dma_length, dev_addr);
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imx_dmav1_writel(dev_addr, DMA_SAR(channel));
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imx_dmav1_writel(imxdmac->internal.ccr_from_device, DMA_CCR(channel));
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} else if (direction == DMA_MEM_TO_DEV) {
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pr_debug("imxdma%d: %s sg=%p sgcount=%d total length=%d "
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"dev_addr=0x%08x for write\n",
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channel, __func__, sg, sgcount, dma_length, dev_addr);
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imx_dmav1_writel(dev_addr, DMA_DAR(channel));
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imx_dmav1_writel(imxdmac->internal.ccr_to_device, DMA_CCR(channel));
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} else {
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printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n",
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channel);
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return -EINVAL;
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}
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imxdma_sg_next(d, sg);
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return 0;
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}
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static void imxdma_watchdog(unsigned long data)
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{
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struct imxdma_channel *imxdmac = (struct imxdma_channel *)data;
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@ -526,7 +473,6 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
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{
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struct imxdma_channel *imxdmac = to_imxdma_chan(d->desc.chan);
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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int ret;
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/* Configure and enable */
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switch (d->type) {
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@ -548,10 +494,37 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
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/* Cyclic transfer is the same as slave_sg with special sg configuration. */
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case IMXDMA_DESC_CYCLIC:
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case IMXDMA_DESC_SLAVE_SG:
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ret = imxdma_setup_sg_hw(d, d->sg, d->sgcount, d->len,
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imxdmac->per_address, d->direction);
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if (ret < 0)
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return ret;
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imxdmac->internal.sg = d->sg;
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imxdmac->internal.resbytes = d->len;
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if (d->direction == DMA_DEV_TO_MEM) {
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imx_dmav1_writel(imxdmac->per_address,
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DMA_SAR(imxdmac->channel));
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imx_dmav1_writel(imxdmac->ccr_from_device,
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DMA_CCR(imxdmac->channel));
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dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
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"total length=%d dev_addr=0x%08x (dev2mem)\n",
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__func__, imxdmac->channel, d->sg, d->sgcount,
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d->len, imxdmac->per_address);
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} else if (d->direction == DMA_MEM_TO_DEV) {
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imx_dmav1_writel(imxdmac->per_address,
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DMA_DAR(imxdmac->channel));
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imx_dmav1_writel(imxdmac->ccr_to_device,
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DMA_CCR(imxdmac->channel));
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dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
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"total length=%d dev_addr=0x%08x (mem2dev)\n",
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__func__, imxdmac->channel, d->sg, d->sgcount,
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d->len, imxdmac->per_address);
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} else {
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dev_err(imxdma->dev, "%s channel: %d bad dma mode\n",
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__func__, imxdmac->channel);
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return -EINVAL;
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}
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imxdma_sg_next(d, d->sg);
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break;
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default:
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return -EINVAL;
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@ -641,11 +614,10 @@ static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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imxdmac->internal.hw_chaining = 1;
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if (!imxdma_hw_chain(&imxdmac->internal))
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return -EINVAL;
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imxdmac->internal.ccr_from_device =
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(mode | IMX_DMA_TYPE_FIFO) |
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imxdmac->ccr_from_device = (mode | IMX_DMA_TYPE_FIFO) |
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((IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) << 2) |
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CCR_REN;
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imxdmac->internal.ccr_to_device =
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imxdmac->ccr_to_device =
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(IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR) |
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((mode | IMX_DMA_TYPE_FIFO) << 2) | CCR_REN;
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imx_dmav1_writel(imxdmac->dma_request,
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