forked from luck/tmp_suning_uos_patched
hwmon: (it87) Add support for all pwm channels on IT8620E
IT8620E supports up to 6 pwm channels. Add support for it. Also check if fan tachometers 4..6 are enabled before instantiating the respective sysfs attributes. Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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730554059b
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36c4d98a78
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@ -168,6 +168,7 @@ static inline void superio_exit(void)
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#define IT87_SIO_GPIO1_REG 0x25
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#define IT87_SIO_GPIO2_REG 0x26
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#define IT87_SIO_GPIO3_REG 0x27
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#define IT87_SIO_GPIO4_REG 0x28
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#define IT87_SIO_GPIO5_REG 0x29
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#define IT87_SIO_PINX1_REG 0x2a /* Pin selection */
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#define IT87_SIO_PINX2_REG 0x2c /* Pin selection */
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@ -227,8 +228,8 @@ static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
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#define IT87_REG_FAN_MAIN_CTRL 0x13
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#define IT87_REG_FAN_CTL 0x14
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#define IT87_REG_PWM(nr) (0x15 + (nr))
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#define IT87_REG_PWM_DUTY(nr) (0x63 + (nr) * 8)
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static const u8 IT87_REG_PWM[] = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
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static const u8 IT87_REG_PWM_DUTY[] = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
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#define IT87_REG_VIN(nr) (0x20 + (nr))
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#define IT87_REG_TEMP(nr) (0x29 + (nr))
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@ -272,6 +273,7 @@ struct it87_devices {
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#define FEAT_SIX_FANS (1 << 11) /* Supports six fans */
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#define FEAT_10_9MV_ADC (1 << 12)
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#define FEAT_AVCC3 (1 << 13) /* Chip supports in9/AVCC3 */
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#define FEAT_SIX_PWM (1 << 14) /* Chip supports 6 pwm chn */
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static const struct it87_devices it87_devices[] = {
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[it87] = {
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@ -401,7 +403,7 @@ static const struct it87_devices it87_devices[] = {
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.suffix = "E",
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.features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
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| FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
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| FEAT_IN7_INTERNAL,
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| FEAT_IN7_INTERNAL | FEAT_SIX_PWM,
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.peci_mask = 0x07,
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},
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};
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@ -424,6 +426,7 @@ static const struct it87_devices it87_devices[] = {
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#define has_in7_internal(data) ((data)->features & FEAT_IN7_INTERNAL)
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#define has_six_fans(data) ((data)->features & FEAT_SIX_FANS)
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#define has_avcc3(data) ((data)->features & FEAT_AVCC3)
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#define has_six_pwm(data) ((data)->features & FEAT_SIX_PWM)
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struct it87_sio_data {
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enum chips type;
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@ -483,9 +486,9 @@ struct it87_data {
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* is no longer needed, but it is still done to keep the driver
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* simple.
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*/
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u8 pwm_ctrl[3]; /* Register value */
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u8 pwm_duty[3]; /* Manual PWM value set by user */
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u8 pwm_temp_map[3]; /* PWM to temp. chan. mapping (bits 1-0) */
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u8 pwm_ctrl[6]; /* Register value */
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u8 pwm_duty[6]; /* Manual PWM value set by user */
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u8 pwm_temp_map[6]; /* PWM to temp. chan. mapping (bits 1-0) */
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/* Automatic fan speed control registers */
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u8 auto_pwm[3][4]; /* [nr][3] is hard-coded */
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@ -1068,7 +1071,7 @@ static ssize_t set_pwm_enable(struct device *dev,
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data->pwm_duty[nr];
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else /* Automatic mode */
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data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
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it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
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it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
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if (data->type != it8603) {
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/* set SmartGuardian mode */
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@ -1104,7 +1107,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
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return -EBUSY;
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}
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data->pwm_duty[nr] = pwm_to_reg(data, val);
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it87_write_value(data, IT87_REG_PWM_DUTY(nr),
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it87_write_value(data, IT87_REG_PWM_DUTY[nr],
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data->pwm_duty[nr]);
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} else {
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data->pwm_duty[nr] = pwm_to_reg(data, val);
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@ -1114,7 +1117,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
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*/
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if (!(data->pwm_ctrl[nr] & 0x80)) {
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data->pwm_ctrl[nr] = data->pwm_duty[nr];
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it87_write_value(data, IT87_REG_PWM(nr),
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it87_write_value(data, IT87_REG_PWM[nr],
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data->pwm_ctrl[nr]);
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}
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}
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@ -1207,7 +1210,7 @@ static ssize_t set_pwm_temp_map(struct device *dev,
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*/
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if (data->pwm_ctrl[nr] & 0x80) {
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data->pwm_ctrl[nr] = 0x80 | data->pwm_temp_map[nr];
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it87_write_value(data, IT87_REG_PWM(nr), data->pwm_ctrl[nr]);
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it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
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}
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mutex_unlock(&data->update_lock);
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return count;
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@ -1385,6 +1388,27 @@ static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
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static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
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show_auto_temp, set_auto_temp, 2, 4);
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static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
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show_pwm_enable, set_pwm_enable, 3);
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static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
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static DEVICE_ATTR(pwm4_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
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static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO | S_IWUSR,
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show_pwm_temp_map, set_pwm_temp_map, 3);
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static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
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show_pwm_enable, set_pwm_enable, 4);
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static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
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static DEVICE_ATTR(pwm5_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
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static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO | S_IWUSR,
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show_pwm_temp_map, set_pwm_temp_map, 4);
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static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
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show_pwm_enable, set_pwm_enable, 5);
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static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
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static DEVICE_ATTR(pwm6_freq, S_IRUGO | S_IWUSR, show_pwm_freq, set_pwm_freq);
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static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO | S_IWUSR,
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show_pwm_temp_map, set_pwm_temp_map, 5);
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/* Alarms */
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static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
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char *buf)
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@ -1747,7 +1771,7 @@ static const struct attribute *it87_attributes_fan_div[] = {
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&sensor_dev_attr_fan3_div.dev_attr.attr,
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};
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static struct attribute *it87_attributes_pwm[3][4+1] = { {
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static struct attribute *it87_attributes_pwm[6][4+1] = { {
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&sensor_dev_attr_pwm1_enable.dev_attr.attr,
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&sensor_dev_attr_pwm1.dev_attr.attr,
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&dev_attr_pwm1_freq.attr,
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@ -1765,12 +1789,33 @@ static struct attribute *it87_attributes_pwm[3][4+1] = { {
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&dev_attr_pwm3_freq.attr,
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&sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
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NULL
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}, {
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&sensor_dev_attr_pwm4_enable.dev_attr.attr,
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&sensor_dev_attr_pwm4.dev_attr.attr,
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&dev_attr_pwm4_freq.attr,
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&sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
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NULL
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}, {
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&sensor_dev_attr_pwm5_enable.dev_attr.attr,
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&sensor_dev_attr_pwm5.dev_attr.attr,
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&dev_attr_pwm5_freq.attr,
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&sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
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NULL
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}, {
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&sensor_dev_attr_pwm6_enable.dev_attr.attr,
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&sensor_dev_attr_pwm6.dev_attr.attr,
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&dev_attr_pwm6_freq.attr,
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&sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
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NULL
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} };
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static const struct attribute_group it87_group_pwm[3] = {
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static const struct attribute_group it87_group_pwm[6] = {
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{ .attrs = it87_attributes_pwm[0] },
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{ .attrs = it87_attributes_pwm[1] },
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{ .attrs = it87_attributes_pwm[2] },
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{ .attrs = it87_attributes_pwm[3] },
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{ .attrs = it87_attributes_pwm[4] },
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{ .attrs = it87_attributes_pwm[5] },
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};
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static struct attribute *it87_attributes_autopwm[3][9+1] = { {
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@ -1955,6 +2000,9 @@ static int __init it87_find(unsigned short *address,
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else
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sio_data->skip_in |= (1 << 9);
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if (!has_six_pwm(config))
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sio_data->skip_pwm |= (1 << 3) | (1 << 4) | (1 << 5);
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if (!has_vid(config))
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sio_data->skip_vid = 1;
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@ -2057,6 +2105,11 @@ static int __init it87_find(unsigned short *address,
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superio_select(GPIO);
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/* Check for pwm5 */
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reg = superio_inb(IT87_SIO_GPIO1_REG);
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if (reg & (1 << 6))
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sio_data->skip_pwm |= (1 << 4);
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/* Check for fan4, fan5 */
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reg = superio_inb(IT87_SIO_GPIO2_REG);
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if (!(reg & (1 << 5)))
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if (reg & (1 << 7))
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sio_data->skip_fan |= (1 << 2);
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/* Check for pwm4 */
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reg = superio_inb(IT87_SIO_GPIO4_REG);
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if (!(reg & (1 << 2)))
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sio_data->skip_pwm |= (1 << 3);
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/* Check for pwm2, fan2 */
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reg = superio_inb(IT87_SIO_GPIO5_REG);
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if (reg & (1 << 1))
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sio_data->skip_pwm |= (1 << 1);
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if (reg & (1 << 2))
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sio_data->skip_fan |= (1 << 1);
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/* Check for pwm6, fan6 */
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if (!(reg & (1 << 7))) {
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sio_data->skip_pwm |= (1 << 5);
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sio_data->skip_fan |= (1 << 5);
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}
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sio_data->beep_pin = superio_inb(IT87_SIO_BEEP_PIN_REG) & 0x3f;
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} else {
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@ -2219,7 +2282,7 @@ static void it87_remove_files(struct device *dev)
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sysfs_remove_file(&dev->kobj,
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it87_attributes_fan_div[i]);
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}
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for (i = 0; i < 3; i++) {
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for (i = 0; i < 6; i++) {
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if (sio_data->skip_pwm & (1 << i))
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continue;
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sysfs_remove_group(&dev->kobj, &it87_group_pwm[i]);
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@ -2402,7 +2465,7 @@ static int it87_probe(struct platform_device *pdev)
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}
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if (enable_pwm_interface) {
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for (i = 0; i < 3; i++) {
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for (i = 0; i < 6; i++) {
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if (sio_data->skip_pwm & (1 << i))
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continue;
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err = sysfs_create_group(&dev->kobj,
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@ -2505,7 +2568,7 @@ static int it87_check_pwm(struct device *dev)
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for (i = 0; i < 3; i++)
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pwm[i] = it87_read_value(data,
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IT87_REG_PWM(i));
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IT87_REG_PWM[i]);
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/*
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* If any fan is in automatic pwm mode, the polarity
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@ -2520,7 +2583,7 @@ static int it87_check_pwm(struct device *dev)
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tmp | 0x87);
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for (i = 0; i < 3; i++)
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it87_write_value(data,
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IT87_REG_PWM(i),
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IT87_REG_PWM[i],
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0x7f & ~pwm[i]);
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return 1;
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}
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@ -2635,6 +2698,16 @@ static void it87_init_device(struct platform_device *pdev)
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/* Fan input pins may be used for alternative functions */
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data->has_fan &= ~sio_data->skip_fan;
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/* Check if pwm5, pwm6 are enabled */
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if (has_six_pwm(data)) {
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/* The following code may be IT8620E specific */
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tmp = it87_read_value(data, IT87_REG_FAN_DIV);
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if ((tmp & 0xc0) == 0xc0)
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sio_data->skip_pwm |= (1 << 4);
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if (!(tmp & (1 << 3)))
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sio_data->skip_pwm |= (1 << 5);
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}
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/* Start monitoring */
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it87_write_value(data, IT87_REG_CONFIG,
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(it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
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static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
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{
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data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM(nr));
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data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
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if (has_newer_autopwm(data)) {
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data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
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data->pwm_temp_map[nr] = (data->pwm_ctrl[nr] & 0x03) +
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nr < 3 ? 0 : 3;
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data->pwm_duty[nr] = it87_read_value(data,
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IT87_REG_PWM_DUTY(nr));
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IT87_REG_PWM_DUTY[nr]);
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} else {
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if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */
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data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
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data->fan_main_ctrl = it87_read_value(data,
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IT87_REG_FAN_MAIN_CTRL);
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data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
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for (i = 0; i < 3; i++)
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for (i = 0; i < 6; i++)
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it87_update_pwm_ctrl(data, i);
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data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
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