forked from luck/tmp_suning_uos_patched
powerpc: sysdev/fsl_msi irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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c47eefa660
commit
37e166151d
@ -47,14 +47,14 @@ static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
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* We do not need this actually. The MSIR register has been read once
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* in the cascade interrupt. So, this MSI interrupt has been acked
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*/
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static void fsl_msi_end_irq(unsigned int virq)
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static void fsl_msi_end_irq(struct irq_data *d)
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{
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}
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static struct irq_chip fsl_msi_chip = {
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.irq_mask = mask_msi_irq,
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.irq_unmask = unmask_msi_irq,
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.ack = fsl_msi_end_irq,
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.irq_ack = fsl_msi_end_irq,
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.name = "FSL-MSI",
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};
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@ -183,6 +183,7 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = get_irq_desc_chip(desc);
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unsigned int cascade_irq;
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struct fsl_msi *msi_data;
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int msir_index = -1;
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@ -196,11 +197,11 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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raw_spin_lock(&desc->lock);
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if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
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if (desc->chip->mask_ack)
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desc->chip->mask_ack(irq);
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if (chip->irq_mask_ack)
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chip->irq_mask_ack(&desc->irq_data);
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else {
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desc->chip->mask(irq);
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desc->chip->ack(irq);
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chip->irq_mask(&desc->irq_data);
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chip->irq_ack(&desc->irq_data);
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}
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}
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@ -238,11 +239,11 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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switch (msi_data->feature & FSL_PIC_IP_MASK) {
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case FSL_PIC_IP_MPIC:
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desc->chip->eoi(irq);
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chip->irq_eoi(&desc->irq_data);
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break;
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case FSL_PIC_IP_IPIC:
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if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
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desc->chip->unmask(irq);
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if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
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chip->irq_unmask(&desc->irq_data);
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break;
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}
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unlock:
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