forked from luck/tmp_suning_uos_patched
bnx2x: Combine get_pcie_width and get_pcie_speed
The functions bnx2x_get_pcie_width() and bnx2x_get_pcie_speed() were combined into bnx2x_get_pcie_width_speed() so that there is only 1 PCI read to PCICFG_OFFSET + PCICFG_LINK_CONTROL rather then 2 reads. Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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e3553b29c6
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@ -11671,31 +11671,26 @@ static int __devinit bnx2x_init_dev(struct pci_dev *pdev,
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return rc;
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}
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static int __devinit bnx2x_get_pcie_width(struct bnx2x *bp)
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static void __devinit bnx2x_get_pcie_width_speed(struct bnx2x *bp,
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int *width, int *speed)
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{
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u32 val = REG_RD(bp, PCICFG_OFFSET + PCICFG_LINK_CONTROL);
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val = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
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return val;
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*width = (val & PCICFG_LINK_WIDTH) >> PCICFG_LINK_WIDTH_SHIFT;
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/* return value of 1=2.5GHz 2=5GHz */
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*speed = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
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}
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/* return value of 1=2.5GHz 2=5GHz */
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static int __devinit bnx2x_get_pcie_speed(struct bnx2x *bp)
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{
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u32 val = REG_RD(bp, PCICFG_OFFSET + PCICFG_LINK_CONTROL);
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val = (val & PCICFG_LINK_SPEED) >> PCICFG_LINK_SPEED_SHIFT;
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return val;
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}
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static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
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{
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const struct firmware *firmware = bp->firmware;
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struct bnx2x_fw_file_hdr *fw_hdr;
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struct bnx2x_fw_file_section *sections;
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u16 *ops_offsets;
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u32 offset, len, num_ops;
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u16 *ops_offsets;
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int i;
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const struct firmware *firmware = bp->firmware;
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const u8 * fw_ver;
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const u8 *fw_ver;
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if (firmware->size < sizeof(struct bnx2x_fw_file_hdr))
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return -EINVAL;
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@ -11709,7 +11704,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
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offset = be32_to_cpu(sections[i].offset);
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len = be32_to_cpu(sections[i].len);
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if (offset + len > firmware->size) {
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printk(KERN_ERR PFX "Section %d length is out of bounds\n", i);
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printk(KERN_ERR PFX "Section %d length is out of "
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"bounds\n", i);
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return -EINVAL;
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}
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}
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@ -11721,7 +11717,8 @@ static int __devinit bnx2x_check_firmware(struct bnx2x *bp)
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for (i = 0; i < be32_to_cpu(fw_hdr->init_ops_offsets.len) / 2; i++) {
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if (be16_to_cpu(ops_offsets[i]) > num_ops) {
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printk(KERN_ERR PFX "Section offset %d is out of bounds\n", i);
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printk(KERN_ERR PFX "Section offset %d is out of "
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"bounds\n", i);
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return -EINVAL;
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}
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}
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@ -11878,6 +11875,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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static int version_printed;
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struct net_device *dev = NULL;
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struct bnx2x *bp;
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int pcie_width, pcie_speed;
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int rc;
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if (version_printed++ == 0)
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@ -11918,11 +11916,11 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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goto init_one_exit;
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}
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bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed);
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printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx,"
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" IRQ %d, ", dev->name, board_info[ent->driver_data].name,
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(CHIP_REV(bp) >> 12) + 'A', (CHIP_METAL(bp) >> 4),
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bnx2x_get_pcie_width(bp),
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(bnx2x_get_pcie_speed(bp) == 2) ? "5GHz (Gen2)" : "2.5GHz",
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pcie_width, (pcie_speed == 2) ? "5GHz (Gen2)" : "2.5GHz",
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dev->base_addr, bp->pdev->irq);
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printk(KERN_CONT "node addr %pM\n", dev->dev_addr);
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