forked from luck/tmp_suning_uos_patched
perf intel-pt: Do not use TSC packets for calculating CPU cycles to TSC
CBR (core-to-bus ratio) packets provide an indication of CPU frequency. A more accurate measure can be made by counting the cycles (given by CYC packets) in between other timing packets (either MTC or TSC). Using TSC packets has at least 2 issues: 1) timing might have stopped (e.g. mwait) or 2) TSC packets within PSB+ might slip past CYC packets. For now, simply do not use TSC packets for calculating CPU cycles to TSC. That leaves the case where 2 MTC packets are used, otherwise falling back to the CBR value. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: Andi Kleen <ak@linux.intel.com> Link: http://lkml.kernel.org/r/1495786658-18063-37-git-send-email-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -711,6 +711,12 @@ static int intel_pt_calc_cyc_cb(struct intel_pt_pkt_info *pkt_info)
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break;
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case INTEL_PT_TSC:
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/*
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* For now, do not support using TSC packets - refer
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* intel_pt_calc_cyc_to_tsc().
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*/
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if (data->from_mtc)
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return 1;
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timestamp = pkt_info->packet.payload |
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(data->timestamp & (0xffULL << 56));
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if (data->from_mtc && timestamp < data->timestamp &&
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@ -828,6 +834,14 @@ static void intel_pt_calc_cyc_to_tsc(struct intel_pt_decoder *decoder,
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.cbr_cyc_to_tsc = 0,
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};
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/*
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* For now, do not support using TSC packets for at least the reasons:
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* 1) timing might have stopped
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* 2) TSC packets within PSB+ can slip against CYC packets
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*/
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if (!from_mtc)
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return;
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intel_pt_pkt_lookahead(decoder, intel_pt_calc_cyc_cb, &data);
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}
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