forked from luck/tmp_suning_uos_patched
rtl818x: merge tx/rx descriptor flags
Tx/Rx descriptor flags are common between rtl818x devices, only with additions for newer chips, thus use same flags in the code. Signed-off-by: Herton Ronaldo Krzesinski <herton@mandriva.com.br> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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2540e0511e
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38e3b0d86e
@ -24,20 +24,6 @@
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#define ANAPARAM_PWR1_SHIFT 20
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#define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
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enum rtl8180_tx_desc_flags {
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RTL8180_TX_DESC_FLAG_NO_ENC = (1 << 15),
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RTL8180_TX_DESC_FLAG_TX_OK = (1 << 15),
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RTL8180_TX_DESC_FLAG_SPLCP = (1 << 16),
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RTL8180_TX_DESC_FLAG_RX_UNDER = (1 << 16),
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RTL8180_TX_DESC_FLAG_MOREFRAG = (1 << 17),
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RTL8180_TX_DESC_FLAG_CTS = (1 << 18),
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RTL8180_TX_DESC_FLAG_RTS = (1 << 23),
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RTL8180_TX_DESC_FLAG_LS = (1 << 28),
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RTL8180_TX_DESC_FLAG_FS = (1 << 29),
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RTL8180_TX_DESC_FLAG_DMA = (1 << 30),
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RTL8180_TX_DESC_FLAG_OWN = (1 << 31)
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};
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struct rtl8180_tx_desc {
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__le32 flags;
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__le16 rts_duration;
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@ -52,23 +38,6 @@ struct rtl8180_tx_desc {
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u32 reserved[2];
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} __attribute__ ((packed));
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enum rtl8180_rx_desc_flags {
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RTL8180_RX_DESC_FLAG_ICV_ERR = (1 << 12),
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RTL8180_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
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RTL8180_RX_DESC_FLAG_PM = (1 << 14),
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RTL8180_RX_DESC_FLAG_RX_ERR = (1 << 15),
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RTL8180_RX_DESC_FLAG_BCAST = (1 << 16),
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RTL8180_RX_DESC_FLAG_PAM = (1 << 17),
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RTL8180_RX_DESC_FLAG_MCAST = (1 << 18),
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RTL8180_RX_DESC_FLAG_SPLCP = (1 << 25),
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RTL8180_RX_DESC_FLAG_FOF = (1 << 26),
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RTL8180_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
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RTL8180_RX_DESC_FLAG_LS = (1 << 28),
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RTL8180_RX_DESC_FLAG_FS = (1 << 29),
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RTL8180_RX_DESC_FLAG_EOR = (1 << 30),
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RTL8180_RX_DESC_FLAG_OWN = (1 << 31)
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};
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struct rtl8180_rx_desc {
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__le32 flags;
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__le32 flags2;
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@ -110,12 +110,12 @@ static void rtl8180_handle_rx(struct ieee80211_hw *dev)
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struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
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u32 flags = le32_to_cpu(entry->flags);
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if (flags & RTL8180_RX_DESC_FLAG_OWN)
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if (flags & RTL818X_RX_DESC_FLAG_OWN)
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return;
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if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
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RTL8180_RX_DESC_FLAG_FOF |
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RTL8180_RX_DESC_FLAG_RX_ERR)))
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if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
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RTL818X_RX_DESC_FLAG_FOF |
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RTL818X_RX_DESC_FLAG_RX_ERR)))
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goto done;
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else {
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u32 flags2 = le32_to_cpu(entry->flags2);
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@ -140,7 +140,7 @@ static void rtl8180_handle_rx(struct ieee80211_hw *dev)
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rx_status.band = dev->conf.channel->band;
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rx_status.mactime = le64_to_cpu(entry->tsft);
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rx_status.flag |= RX_FLAG_TSFT;
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if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
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if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
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rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
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ieee80211_rx_irqsafe(dev, skb, &rx_status);
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@ -154,10 +154,10 @@ static void rtl8180_handle_rx(struct ieee80211_hw *dev)
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done:
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entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
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entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
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entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
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MAX_RX_SIZE);
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if (priv->rx_idx == 31)
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entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
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entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
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priv->rx_idx = (priv->rx_idx + 1) % 32;
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}
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}
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@ -173,7 +173,7 @@ static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
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struct ieee80211_tx_info *info;
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u32 flags = le32_to_cpu(entry->flags);
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if (flags & RTL8180_TX_DESC_FLAG_OWN)
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if (flags & RTL818X_TX_DESC_FLAG_OWN)
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return;
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ring->idx = (ring->idx + 1) % ring->entries;
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@ -185,7 +185,7 @@ static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
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memset(&info->status, 0, sizeof(info->status));
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if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
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if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
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if (flags & RTL818X_TX_DESC_FLAG_TX_OK)
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info->flags |= IEEE80211_TX_STAT_ACK;
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else
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info->status.excessive_retries = 1;
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@ -252,20 +252,20 @@ static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
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mapping = pci_map_single(priv->pdev, skb->data,
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skb->len, PCI_DMA_TODEVICE);
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tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
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RTL8180_TX_DESC_FLAG_LS |
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tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
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RTL818X_TX_DESC_FLAG_LS |
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(ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
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skb->len;
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if (priv->r8185)
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tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
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RTL8180_TX_DESC_FLAG_NO_ENC;
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tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
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RTL818X_TX_DESC_FLAG_NO_ENC;
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if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
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tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
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tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
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tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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} else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
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tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
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tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
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tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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}
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@ -446,10 +446,10 @@ static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
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*mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
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MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
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entry->rx_buf = cpu_to_le32(*mapping);
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entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
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entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
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MAX_RX_SIZE);
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}
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entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
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entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
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return 0;
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}
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@ -58,12 +58,6 @@ struct rtl8187b_rx_hdr {
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/* {rtl8187,rtl8187b}_tx_info is in skb */
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/* Tx flags are common between rtl8187 and rtl8187b */
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#define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
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#define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
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#define RTL8187_TX_FLAG_CTS (1 << 18)
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#define RTL8187_TX_FLAG_RTS (1 << 23)
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struct rtl8187_tx_hdr {
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__le32 flags;
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__le16 rts_duration;
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@ -187,18 +187,18 @@ static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
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}
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flags = skb->len;
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flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
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flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
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flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
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if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
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flags |= RTL8187_TX_FLAG_MORE_FRAG;
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flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
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if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
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flags |= RTL8187_TX_FLAG_RTS;
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flags |= RTL818X_TX_DESC_FLAG_RTS;
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flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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rts_dur = ieee80211_rts_duration(dev, priv->vif,
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skb->len, info);
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} else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
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flags |= RTL8187_TX_FLAG_CTS;
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flags |= RTL818X_TX_DESC_FLAG_CTS;
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flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
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}
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@ -354,7 +354,7 @@ static void rtl8187_rx_cb(struct urb *urb)
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rx_status.freq = dev->conf.channel->center_freq;
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rx_status.band = dev->conf.channel->band;
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rx_status.flag |= RX_FLAG_TSFT;
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if (flags & (1 << 13))
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if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
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rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
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ieee80211_rx_irqsafe(dev, skb, &rx_status);
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@ -193,4 +193,39 @@ struct rtl818x_rf_ops {
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void (*set_chan)(struct ieee80211_hw *, struct ieee80211_conf *);
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};
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/* Tx/Rx flags are common between RTL818X chips */
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enum rtl818x_tx_desc_flags {
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RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
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RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
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RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
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RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
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RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
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RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
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RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
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RTL818X_TX_DESC_FLAG_LS = (1 << 28),
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RTL818X_TX_DESC_FLAG_FS = (1 << 29),
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RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
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RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
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};
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enum rtl818x_rx_desc_flags {
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RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
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RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
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RTL818X_RX_DESC_FLAG_PM = (1 << 14),
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RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
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RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
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RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
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RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
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RTL818X_RX_DESC_FLAG_QOS = (1 << 19), /* RTL8187(B) only */
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RTL818X_RX_DESC_FLAG_TRSW = (1 << 24), /* RTL8187(B) only */
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RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
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RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
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RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
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RTL818X_RX_DESC_FLAG_LS = (1 << 28),
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RTL818X_RX_DESC_FLAG_FS = (1 << 29),
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RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
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RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
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};
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#endif /* RTL818X_H */
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