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sky2: fix for Yukon FE (regression in 2.6.25)

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The Yukon FE chip has a ram buffer therefore it needs the alignment
restriction and hang check workarounds.

Therefore:
  * Autodetect the prescence/absence of ram buffer
  * Rename the flag value to reflect this
  * Use it consistently (ie don't reread register)

Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Stephen Hemminger 2008-02-04 19:45:13 -08:00 committed by Jeff Garzik
parent 57f78ab3b0
commit 39dbd9587b
2 changed files with 8 additions and 11 deletions
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17
drivers/net/sky2.c
View File

@ -857,7 +857,7 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
/* On chips without ram buffer, pause is controled by MAC level */ /* On chips without ram buffer, pause is controled by MAC level */
if (sky2_read8(hw, B2_E_0) == 0) { if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
@ -1194,7 +1194,7 @@ static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
struct sk_buff *skb; struct sk_buff *skb;
int i; int i;
if (sky2->hw->flags & SKY2_HW_FIFO_HANG_CHECK) { if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
unsigned char *start; unsigned char *start;
/* /*
* Workaround for a bug in FIFO that cause hang * Workaround for a bug in FIFO that cause hang
@ -1387,6 +1387,7 @@ static int sky2_up(struct net_device *dev)
if (ramsize > 0) { if (ramsize > 0) {
u32 rxspace; u32 rxspace;
hw->flags |= SKY2_HW_RAM_BUFFER;
pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize); pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
if (ramsize < 16) if (ramsize < 16)
rxspace = ramsize / 2; rxspace = ramsize / 2;
@ -2026,7 +2027,7 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu)
synchronize_irq(hw->pdev->irq); synchronize_irq(hw->pdev->irq);
if (sky2_read8(hw, B2_E_0) == 0) if (!(hw->flags & SKY2_HW_RAM_BUFFER))
sky2_set_tx_stfwd(hw, port); sky2_set_tx_stfwd(hw, port);
ctl = gma_read16(hw, port, GM_GP_CTRL); ctl = gma_read16(hw, port, GM_GP_CTRL);
@ -2566,7 +2567,7 @@ static void sky2_watchdog(unsigned long arg)
++active; ++active;
/* For chips with Rx FIFO, check if stuck */ /* For chips with Rx FIFO, check if stuck */
if ((hw->flags & SKY2_HW_FIFO_HANG_CHECK) && if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
sky2_rx_hung(dev)) { sky2_rx_hung(dev)) {
pr_info(PFX "%s: receiver hang detected\n", pr_info(PFX "%s: receiver hang detected\n",
dev->name); dev->name);
@ -2722,11 +2723,7 @@ static int __devinit sky2_init(struct sky2_hw *hw)
switch(hw->chip_id) { switch(hw->chip_id) {
case CHIP_ID_YUKON_XL: case CHIP_ID_YUKON_XL:
hw->flags = SKY2_HW_GIGABIT hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
| SKY2_HW_NEWER_PHY;
if (hw->chip_rev < 3)
hw->flags |= SKY2_HW_FIFO_HANG_CHECK;
break; break;
case CHIP_ID_YUKON_EC_U: case CHIP_ID_YUKON_EC_U:
@ -2752,7 +2749,7 @@ static int __devinit sky2_init(struct sky2_hw *hw)
dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n"); dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
hw->flags = SKY2_HW_GIGABIT | SKY2_HW_FIFO_HANG_CHECK; hw->flags = SKY2_HW_GIGABIT;
break; break;
case CHIP_ID_YUKON_FE: case CHIP_ID_YUKON_FE:

2
drivers/net/sky2.h
View File

@ -2045,7 +2045,7 @@ struct sky2_hw {
#define SKY2_HW_FIBRE_PHY 0x00000002 #define SKY2_HW_FIBRE_PHY 0x00000002
#define SKY2_HW_GIGABIT 0x00000004 #define SKY2_HW_GIGABIT 0x00000004
#define SKY2_HW_NEWER_PHY 0x00000008 #define SKY2_HW_NEWER_PHY 0x00000008
#define SKY2_HW_FIFO_HANG_CHECK 0x00000010 #define SKY2_HW_RAM_BUFFER 0x00000010
#define SKY2_HW_NEW_LE 0x00000020 /* new LSOv2 format */ #define SKY2_HW_NEW_LE 0x00000020 /* new LSOv2 format */
#define SKY2_HW_AUTO_TX_SUM 0x00000040 /* new IP decode for Tx */ #define SKY2_HW_AUTO_TX_SUM 0x00000040 /* new IP decode for Tx */
#define SKY2_HW_ADV_POWER_CTL 0x00000080 /* additional PHY power regs */ #define SKY2_HW_ADV_POWER_CTL 0x00000080 /* additional PHY power regs */