forked from luck/tmp_suning_uos_patched
Blackfin arch: fix bug - dmacopy test case fail on all platform
The cache code I added flushes 1 line too little if the start address is not aligned to the cache size. Cache align the start address so that when we straddle cache aligns, we get the right count. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -25,9 +25,13 @@
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*/
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.macro do_flush flushins:req optflushins optnopins label
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R2 = -L1_CACHE_BYTES;
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/* start = (start & -L1_CACHE_BYTES) */
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R0 = R0 & R2;
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/* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */
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R1 += -1;
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R2 = -L1_CACHE_BYTES;
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R1 = R1 & R2;
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R1 += L1_CACHE_BYTES;
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