forked from luck/tmp_suning_uos_patched
USB: AM35x: Add musb support
AM35x has musb interface (version 1.8) and uses CPPI41 DMA engine. It has USB phy built inside the IP itself. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -375,6 +375,31 @@ static void __init am3517_evm_init_irq(void)
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omap_gpio_init();
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}
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static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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.mode = MUSB_OTG,
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.power = 500,
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};
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static __init void am3517_evm_musb_init(void)
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{
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u32 devconf2;
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/*
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* Set up USB clock/mode in the DEVCONF2 register.
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*/
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devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
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/* USB2.0 PHY reference clock is 13 MHz */
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devconf2 &= ~(CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE);
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devconf2 |= CONF2_REFFREQ_13MHZ | CONF2_SESENDEN | CONF2_VBDTCTEN
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| CONF2_DATPOL;
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omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
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usb_musb_init(&musb_board_data);
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}
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static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
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.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
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#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
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@ -393,6 +418,8 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
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#ifdef CONFIG_OMAP_MUX
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static struct omap_board_mux board_mux[] __initdata = {
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/* USB OTG DRVVBUS offset = 0x212 */
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OMAP3_MUX(SAD2D_MCAD23, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
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{ .reg_offset = OMAP_MUX_TERMINATOR },
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};
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#else
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@ -459,6 +486,9 @@ static void __init am3517_evm_init(void)
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ARRAY_SIZE(am3517evm_i2c1_boardinfo));
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/*Ethernet*/
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am3517_evm_ethernet_init(&am3517_evm_emac_pdata);
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/* MUSB */
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am3517_evm_musb_init();
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}
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MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
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@ -28,6 +28,7 @@
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <mach/am35xx.h>
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#include <plat/usb.h>
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#ifdef CONFIG_USB_MUSB_SOC
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@ -89,6 +90,9 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data)
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{
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if (cpu_is_omap243x()) {
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musb_resources[0].start = OMAP243X_HS_BASE;
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} else if (cpu_is_omap3517() || cpu_is_omap3505()) {
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musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
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musb_resources[1].start = INT_35XX_USBOTG_IRQ;
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} else if (cpu_is_omap34xx()) {
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musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
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} else if (cpu_is_omap44xx()) {
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@ -218,6 +218,27 @@ static inline omap2_usbfs_init(struct omap_usb_config *pdata)
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# define USBT2TLL5PI (1 << 17)
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# define USB0PUENACTLOI (1 << 16)
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# define USBSTANDBYCTRL (1 << 15)
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/* AM35x */
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/* USB 2.0 PHY Control */
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#define CONF2_PHY_GPIOMODE (1 << 23)
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#define CONF2_OTGMODE (3 << 14)
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#define CONF2_NO_OVERRIDE (0 << 14)
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#define CONF2_FORCE_HOST (1 << 14)
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#define CONF2_FORCE_DEVICE (2 << 14)
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#define CONF2_FORCE_HOST_VBUS_LOW (3 << 14)
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#define CONF2_SESENDEN (1 << 13)
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#define CONF2_VBDTCTEN (1 << 12)
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#define CONF2_REFFREQ_24MHZ (2 << 8)
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#define CONF2_REFFREQ_26MHZ (7 << 8)
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#define CONF2_REFFREQ_13MHZ (6 << 8)
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#define CONF2_REFFREQ (0xf << 8)
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#define CONF2_PHYCLKGD (1 << 7)
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#define CONF2_VBUSSENSE (1 << 6)
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#define CONF2_PHY_PLLON (1 << 5)
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#define CONF2_RESET (1 << 4)
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#define CONF2_PHYPWRDN (1 << 3)
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#define CONF2_OTGPWRDN (1 << 2)
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#define CONF2_DATPOL (1 << 1)
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#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
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u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
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