forked from luck/tmp_suning_uos_patched
arm: mvebu: Add support for local interrupt
MPIC allows the use of private interrupt for each CPUs. The 28th first interrupts are per-cpu. This patch adds support to use them. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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3a6f08a370
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@ -145,10 +145,17 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
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{
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armada_370_xp_irq_mask(irq_get_irq_data(virq));
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writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
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irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
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handle_level_irq);
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irq_set_status_flags(virq, IRQ_LEVEL);
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if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) {
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irq_set_percpu_devid(virq);
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irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
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handle_percpu_devid_irq);
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} else {
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irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
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handle_level_irq);
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}
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set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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return 0;
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@ -245,7 +252,7 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs
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if (irqnr > 1022)
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break;
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if (irqnr >= 8) {
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if (irqnr > 0) {
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irqnr = irq_find_mapping(armada_370_xp_mpic_domain,
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irqnr);
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handle_IRQ(irqnr, regs);
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