forked from luck/tmp_suning_uos_patched
Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
This commit is contained in:
commit
3b44f137b9
@ -539,6 +539,15 @@ config BLK_DEV_CS5530
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It is safe to say Y to this question.
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config BLK_DEV_CS5535
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tristate "AMD CS5535 chipset support"
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depends on X86 && !X86_64
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help
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Include support for UDMA on the NSC/AMD CS5535 companion chipset.
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This will automatically be detected and configured if found.
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It is safe to say Y to this question.
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config BLK_DEV_HPT34X
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tristate "HPT34X chipset support"
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help
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@ -2038,11 +2038,9 @@ static int idefloppy_ioctl(struct inode *inode, struct file *file,
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struct ide_floppy_obj *floppy = ide_floppy_g(bdev->bd_disk);
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ide_drive_t *drive = floppy->drive;
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void __user *argp = (void __user *)arg;
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int err = generic_ide_ioctl(drive, file, bdev, cmd, arg);
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int err;
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int prevent = (arg) ? 1 : 0;
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idefloppy_pc_t pc;
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if (err != -EINVAL)
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return err;
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switch (cmd) {
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case CDROMEJECT:
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@ -2094,7 +2092,7 @@ static int idefloppy_ioctl(struct inode *inode, struct file *file,
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case IDEFLOPPY_IOCTL_FORMAT_GET_PROGRESS:
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return idefloppy_get_format_progress(drive, argp);
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}
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return -EINVAL;
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return generic_ide_ioctl(drive, file, bdev, cmd, arg);
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}
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static int idefloppy_media_changed(struct gendisk *disk)
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@ -104,8 +104,6 @@ void default_hwif_iops (ide_hwif_t *hwif)
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hwif->INSL = ide_insl;
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}
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EXPORT_SYMBOL(default_hwif_iops);
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/*
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* MMIO operations, typically used for SATA controllers
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*/
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@ -329,8 +327,6 @@ void default_hwif_transport(ide_hwif_t *hwif)
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hwif->atapi_output_bytes = atapi_output_bytes;
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}
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EXPORT_SYMBOL(default_hwif_transport);
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/*
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* Beginning of Taskfile OPCODE Library and feature sets.
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*/
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@ -529,8 +525,6 @@ int wait_for_ready (ide_drive_t *drive, int timeout)
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return 0;
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}
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EXPORT_SYMBOL(wait_for_ready);
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/*
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* This routine busy-waits for the drive status to be not "busy".
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* It then checks the status for all of the "good" bits and none
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@ -161,8 +161,6 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task)
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return ide_stopped;
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}
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EXPORT_SYMBOL(do_rw_taskfile);
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/*
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* set_multmode_intr() is invoked on completion of a WIN_SETMULT cmd.
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*/
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@ -803,6 +803,7 @@ int ide_register_hw_with_fixup(hw_regs_t *hw, ide_hwif_t **hwifp, void(*fixup)(i
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hwif->irq = hw->irq;
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hwif->noprobe = 0;
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hwif->chipset = hw->chipset;
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hwif->gendev.parent = hw->dev;
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if (!initializing) {
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probe_hwif_init_with_fixup(hwif, fixup);
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@ -182,13 +182,14 @@ static void ide_detach(dev_link_t *link)
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} /* ide_detach */
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static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq)
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static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq, struct pcmcia_device *handle)
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{
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hw_regs_t hw;
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memset(&hw, 0, sizeof(hw));
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ide_init_hwif_ports(&hw, io, ctl, NULL);
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hw.irq = irq;
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hw.chipset = ide_pci;
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hw.dev = &handle->dev;
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return ide_register_hw_with_fixup(&hw, NULL, ide_undecoded_slave);
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}
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@ -327,12 +328,12 @@ static void ide_config(dev_link_t *link)
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/* retry registration in case device is still spinning up */
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for (hd = -1, i = 0; i < 10; i++) {
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hd = idecs_register(io_base, ctl_base, link->irq.AssignedIRQ);
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hd = idecs_register(io_base, ctl_base, link->irq.AssignedIRQ, handle);
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if (hd >= 0) break;
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if (link->io.NumPorts1 == 0x20) {
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outb(0x02, ctl_base + 0x10);
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hd = idecs_register(io_base + 0x10, ctl_base + 0x10,
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link->irq.AssignedIRQ);
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link->irq.AssignedIRQ, handle);
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if (hd >= 0) {
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io_base += 0x10;
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ctl_base += 0x10;
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@ -6,6 +6,7 @@ obj-$(CONFIG_BLK_DEV_ATIIXP) += atiixp.o
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obj-$(CONFIG_BLK_DEV_CMD64X) += cmd64x.o
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obj-$(CONFIG_BLK_DEV_CS5520) += cs5520.o
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obj-$(CONFIG_BLK_DEV_CS5530) += cs5530.o
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obj-$(CONFIG_BLK_DEV_CS5535) += cs5535.o
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obj-$(CONFIG_BLK_DEV_SC1200) += sc1200.o
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obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o
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obj-$(CONFIG_BLK_DEV_HPT34X) += hpt34x.o
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@ -74,6 +74,7 @@ static struct amd_ide_chip {
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 },
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{ PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 },
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{ 0 }
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};
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@ -491,6 +492,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
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/* 14 */ DECLARE_NV_DEV("NFORCE-MCP04"),
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/* 15 */ DECLARE_NV_DEV("NFORCE-MCP51"),
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/* 16 */ DECLARE_NV_DEV("NFORCE-MCP55"),
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/* 17 */ DECLARE_AMD_DEV("AMD5536"),
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};
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static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
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@ -527,6 +529,7 @@ static struct pci_device_id amd74xx_pci_tbl[] = {
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 },
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 },
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{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 },
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
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305
drivers/ide/pci/cs5535.c
Normal file
305
drivers/ide/pci/cs5535.c
Normal file
@ -0,0 +1,305 @@
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/*
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* linux/drivers/ide/pci/cs5535.c
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*
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* Copyright (C) 2004-2005 Advanced Micro Devices, Inc.
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*
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* History:
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* 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com>
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* - Reworked tuneproc, set_drive, misc mods to prep for mainline
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* - Work was sponsored by CIS (M) Sdn Bhd.
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* Ported to Kernel 2.6.11 on June 26, 2005 by
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* Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
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* Alexander Kiausch <alex.kiausch@t-online.de>
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* Originally developed by AMD for 2.4/2.6
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*
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* Development of this chipset driver was funded
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* by the nice folks at National Semiconductor/AMD.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* Documentation:
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* CS5535 documentation available from AMD
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include "ide-timing.h"
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#define MSR_ATAC_BASE 0x51300000
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#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
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#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
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#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
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#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
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#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
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#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
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#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
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#define ATAC_RESET (MSR_ATAC_BASE+0x10)
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#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
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#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
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#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
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#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
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#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
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#define ATAC_BM0_CMD_PRIM 0x00
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#define ATAC_BM0_STS_PRIM 0x02
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#define ATAC_BM0_PRD 0x04
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#define CS5535_CABLE_DETECT 0x48
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/* Format I PIO settings. We seperate out cmd and data for safer timings */
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static unsigned int cs5535_pio_cmd_timings[5] =
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{ 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 };
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static unsigned int cs5535_pio_dta_timings[5] =
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{ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131 };
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static unsigned int cs5535_mwdma_timings[3] =
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{ 0x7F0FFFF3, 0x7F035352, 0x7f024241 };
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static unsigned int cs5535_udma_timings[5] =
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{ 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 };
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/* Macros to check if the register is the reset value - reset value is an
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invalid timing and indicates the register has not been set previously */
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#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 )
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#define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 )
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/****
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* cs5535_set_speed - Configure the chipset to the new speed
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* @drive: Drive to set up
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* @speed: desired speed
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*
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* cs5535_set_speed() configures the chipset to a new speed.
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*/
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static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
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{
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u32 reg = 0, dummy;
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int unit = drive->select.b.unit;
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/* Set the PIO timings */
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if ((speed & XFER_MODE) == XFER_PIO) {
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u8 pioa;
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u8 piob;
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u8 cmd;
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pioa = speed - XFER_PIO_0;
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piob = ide_get_best_pio_mode(&(drive->hwif->drives[!unit]),
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255, 4, NULL);
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cmd = pioa < piob ? pioa : piob;
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/* Write the speed of the current drive */
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reg = (cs5535_pio_cmd_timings[cmd] << 16) |
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cs5535_pio_dta_timings[pioa];
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wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0);
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/* And if nessesary - change the speed of the other drive */
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rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy);
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if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) !=
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cs5535_pio_cmd_timings[cmd]) {
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reg &= 0x0000FFFF;
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reg |= cs5535_pio_cmd_timings[cmd] << 16;
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wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0);
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}
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/* Set bit 31 of the DMA register for PIO format 1 timings */
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rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
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wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA,
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reg | 0x80000000UL, 0);
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} else {
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rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
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reg &= 0x80000000UL; /* Preserve the PIO format bit */
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if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_7)
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reg |= cs5535_udma_timings[speed - XFER_UDMA_0];
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else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
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reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
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else
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return;
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wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, 0);
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}
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}
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static u8 cs5535_ratemask(ide_drive_t *drive)
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{
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/* eighty93 will return 1 if it's 80core and capable of
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exceeding udma2, 0 otherwise. we need ratemask to set
|
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the max speed and if we can > udma2 then we return 2
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which selects speed_max as udma4 which is the 5535's max
|
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speed, and 1 selects udma2 which is the max for 40c */
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if (!eighty_ninty_three(drive))
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return 1;
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|
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return 2;
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}
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|
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/****
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* cs5535_set_drive - Configure the drive to the new speed
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* @drive: Drive to set up
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* @speed: desired speed
|
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*
|
||||
* cs5535_set_drive() configures the drive and the chipset to a
|
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* new speed. It also can be called by upper layers.
|
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*/
|
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static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
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{
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speed = ide_rate_filter(cs5535_ratemask(drive), speed);
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ide_config_drive_speed(drive, speed);
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cs5535_set_speed(drive, speed);
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|
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return 0;
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}
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|
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/****
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* cs5535_tuneproc - PIO setup
|
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* @drive: drive to set up
|
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* @pio: mode to use (255 for 'best possible')
|
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*
|
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* A callback from the upper layers for PIO-only tuning.
|
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*/
|
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static void cs5535_tuneproc(ide_drive_t *drive, u8 xferspeed)
|
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{
|
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u8 modes[] = { XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3,
|
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XFER_PIO_4 };
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|
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/* cs5535 max pio is pio 4, best_pio will check the blacklist.
|
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i think we don't need to rate_filter the incoming xferspeed
|
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since we know we're only going to choose pio */
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xferspeed = ide_get_best_pio_mode(drive, xferspeed, 4, NULL);
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ide_config_drive_speed(drive, modes[xferspeed]);
|
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cs5535_set_speed(drive, xferspeed);
|
||||
}
|
||||
|
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static int cs5535_config_drive_for_dma(ide_drive_t *drive)
|
||||
{
|
||||
u8 speed;
|
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|
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speed = ide_dma_speed(drive, cs5535_ratemask(drive));
|
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|
||||
/* If no DMA speed was available then let dma_check hit pio */
|
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if (!speed) {
|
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return 0;
|
||||
}
|
||||
|
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cs5535_set_drive(drive, speed);
|
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return ide_dma_enable(drive);
|
||||
}
|
||||
|
||||
static int cs5535_dma_check(ide_drive_t *drive)
|
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{
|
||||
ide_hwif_t *hwif = drive->hwif;
|
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struct hd_driveid *id = drive->id;
|
||||
u8 speed;
|
||||
|
||||
drive->init_speed = 0;
|
||||
|
||||
if ((id->capability & 1) && drive->autodma) {
|
||||
if (ide_use_dma(drive)) {
|
||||
if (cs5535_config_drive_for_dma(drive))
|
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return hwif->ide_dma_on(drive);
|
||||
}
|
||||
|
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goto fast_ata_pio;
|
||||
|
||||
} else if ((id->capability & 8) || (id->field_valid & 2)) {
|
||||
fast_ata_pio:
|
||||
speed = ide_get_best_pio_mode(drive, 255, 4, NULL);
|
||||
cs5535_set_drive(drive, speed);
|
||||
return hwif->ide_dma_off_quietly(drive);
|
||||
}
|
||||
/* IORDY not supported */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)
|
||||
{
|
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u8 bit;
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||||
|
||||
/* if a 80 wire cable was detected */
|
||||
pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit);
|
||||
return (bit & 1);
|
||||
}
|
||||
|
||||
/****
|
||||
* init_hwif_cs5535 - Initialize one ide cannel
|
||||
* @hwif: Channel descriptor
|
||||
*
|
||||
* This gets invoked by the IDE driver once for each channel. It
|
||||
* performs channel-specific pre-initialization before drive probing.
|
||||
*
|
||||
*/
|
||||
static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
|
||||
{
|
||||
int i;
|
||||
|
||||
hwif->autodma = 0;
|
||||
|
||||
hwif->tuneproc = &cs5535_tuneproc;
|
||||
hwif->speedproc = &cs5535_set_drive;
|
||||
hwif->ide_dma_check = &cs5535_dma_check;
|
||||
|
||||
hwif->atapi_dma = 1;
|
||||
hwif->ultra_mask = 0x1F;
|
||||
hwif->mwdma_mask = 0x07;
|
||||
|
||||
|
||||
hwif->udma_four = cs5535_cable_detect(hwif->pci_dev);
|
||||
|
||||
if (!noautodma)
|
||||
hwif->autodma = 1;
|
||||
|
||||
/* just setting autotune and not worrying about bios timings */
|
||||
for (i = 0; i < 2; i++) {
|
||||
hwif->drives[i].autotune = 1;
|
||||
hwif->drives[i].autodma = hwif->autodma;
|
||||
}
|
||||
}
|
||||
|
||||
static ide_pci_device_t cs5535_chipset __devinitdata = {
|
||||
.name = "CS5535",
|
||||
.init_hwif = init_hwif_cs5535,
|
||||
.channels = 1,
|
||||
.autodma = AUTODMA,
|
||||
.bootable = ON_BOARD,
|
||||
};
|
||||
|
||||
static int __devinit cs5535_init_one(struct pci_dev *dev,
|
||||
const struct pci_device_id *id)
|
||||
{
|
||||
return ide_setup_pci_device(dev, &cs5535_chipset);
|
||||
}
|
||||
|
||||
static struct pci_device_id cs5535_pci_tbl[] =
|
||||
{
|
||||
{ PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_IDE, PCI_ANY_ID,
|
||||
PCI_ANY_ID, 0, 0, 0},
|
||||
{ 0, },
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(pci, cs5535_pci_tbl);
|
||||
|
||||
static struct pci_driver driver = {
|
||||
.name = "CS5535_IDE",
|
||||
.id_table = cs5535_pci_tbl,
|
||||
.probe = cs5535_init_one,
|
||||
};
|
||||
|
||||
static int __init cs5535_ide_init(void)
|
||||
{
|
||||
return ide_pci_register_driver(&driver);
|
||||
}
|
||||
|
||||
module_init(cs5535_ide_init);
|
||||
|
||||
MODULE_AUTHOR("AMD");
|
||||
MODULE_DESCRIPTION("PCI driver module for AMD/NS CS5535 IDE");
|
||||
MODULE_LICENSE("GPL");
|
@ -469,7 +469,7 @@ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
|
||||
|
||||
static __devinitdata ide_hwif_t *primary;
|
||||
|
||||
void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
|
||||
static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
|
||||
{
|
||||
if (PCI_FUNC(hwif->pci_dev->devfn) == 1)
|
||||
primary = hwif;
|
||||
|
@ -701,6 +701,7 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
|
||||
unsigned long barsize = pci_resource_len(dev, 5);
|
||||
u8 tmpbyte = 0;
|
||||
void __iomem *ioaddr;
|
||||
u32 tmp, irq_mask;
|
||||
|
||||
/*
|
||||
* Drop back to PIO if we can't map the mmio. Some
|
||||
@ -726,6 +727,14 @@ static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
|
||||
pci_set_drvdata(dev, (void *) ioaddr);
|
||||
|
||||
if (pdev_is_sata(dev)) {
|
||||
/* make sure IDE0/1 interrupts are not masked */
|
||||
irq_mask = (1 << 22) | (1 << 23);
|
||||
tmp = readl(ioaddr + 0x48);
|
||||
if (tmp & irq_mask) {
|
||||
tmp &= ~irq_mask;
|
||||
writel(tmp, ioaddr + 0x48);
|
||||
readl(ioaddr + 0x48); /* flush */
|
||||
}
|
||||
writel(0, ioaddr + 0x148);
|
||||
writel(0, ioaddr + 0x1C8);
|
||||
}
|
||||
|
@ -395,6 +395,7 @@ static int idescsi_end_request (ide_drive_t *drive, int uptodate, int nrsecs)
|
||||
int log = test_bit(IDESCSI_LOG_CMD, &scsi->log);
|
||||
struct Scsi_Host *host;
|
||||
u8 *scsi_buf;
|
||||
int errors = rq->errors;
|
||||
unsigned long flags;
|
||||
|
||||
if (!(rq->flags & (REQ_SPECIAL|REQ_SENSE))) {
|
||||
@ -421,11 +422,11 @@ static int idescsi_end_request (ide_drive_t *drive, int uptodate, int nrsecs)
|
||||
printk (KERN_WARNING "ide-scsi: %s: timed out for %lu\n",
|
||||
drive->name, pc->scsi_cmd->serial_number);
|
||||
pc->scsi_cmd->result = DID_TIME_OUT << 16;
|
||||
} else if (rq->errors >= ERROR_MAX) {
|
||||
} else if (errors >= ERROR_MAX) {
|
||||
pc->scsi_cmd->result = DID_ERROR << 16;
|
||||
if (log)
|
||||
printk ("ide-scsi: %s: I/O error for %lu\n", drive->name, pc->scsi_cmd->serial_number);
|
||||
} else if (rq->errors) {
|
||||
} else if (errors) {
|
||||
if (log)
|
||||
printk ("ide-scsi: %s: check condition for %lu\n", drive->name, pc->scsi_cmd->serial_number);
|
||||
if (!idescsi_check_condition(drive, rq))
|
||||
|
@ -15,10 +15,6 @@
|
||||
|
||||
#include <linux/config.h>
|
||||
|
||||
#ifndef MAX_HWIFS
|
||||
#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
|
||||
#endif
|
||||
|
||||
#define IDE_ARCH_OBSOLETE_DEFAULTS
|
||||
|
||||
static inline int ide_default_irq(unsigned long base)
|
||||
|
@ -41,6 +41,12 @@ static __inline__ int ide_default_irq(unsigned long base)
|
||||
|
||||
static __inline__ unsigned long ide_default_io_base(int index)
|
||||
{
|
||||
/*
|
||||
* If PCI is present then it is not safe to poke around
|
||||
* the other legacy IDE ports. Only 0x1f0 and 0x170 are
|
||||
* defined compatibility mode ports for PCI. A user can
|
||||
* override this using ide= but we must default safe.
|
||||
*/
|
||||
if (pci_find_device(PCI_ANY_ID, PCI_ANY_ID, NULL) == NULL) {
|
||||
switch(index) {
|
||||
case 2: return 0x1e8;
|
||||
|
@ -16,10 +16,6 @@
|
||||
|
||||
#include <linux/config.h>
|
||||
|
||||
#ifndef MAX_HWIFS
|
||||
#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
|
||||
#endif
|
||||
|
||||
#define ide_default_io_ctl(base) (0)
|
||||
|
||||
#include <asm-generic/ide_iops.h>
|
||||
|
@ -17,10 +17,6 @@
|
||||
|
||||
#include <linux/config.h>
|
||||
|
||||
#ifndef MAX_HWIFS
|
||||
#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
|
||||
#endif
|
||||
|
||||
/* Without this, the initialisation of PCI IDE cards end up calling
|
||||
* ide_init_hwif_ports, which won't work. */
|
||||
#ifdef CONFIG_BLK_DEV_IDEPCI
|
||||
|
@ -230,6 +230,7 @@ typedef struct hw_regs_s {
|
||||
int dma; /* our dma entry */
|
||||
ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
|
||||
hwif_chipset_t chipset;
|
||||
struct device *dev;
|
||||
} hw_regs_t;
|
||||
|
||||
/*
|
||||
@ -266,6 +267,10 @@ static inline void ide_std_init_ports(hw_regs_t *hw,
|
||||
|
||||
#include <asm/ide.h>
|
||||
|
||||
#ifndef MAX_HWIFS
|
||||
#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
|
||||
#endif
|
||||
|
||||
/* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
|
||||
#ifndef IDE_ARCH_OBSOLETE_DEFAULTS
|
||||
# define ide_default_io_base(index) (0)
|
||||
|
@ -387,6 +387,7 @@
|
||||
#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511
|
||||
#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515
|
||||
#define PCI_DEVICE_ID_NS_87410 0xd001
|
||||
#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d
|
||||
|
||||
#define PCI_VENDOR_ID_TSENG 0x100c
|
||||
#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
|
||||
@ -487,6 +488,8 @@
|
||||
#define PCI_DEVICE_ID_AMD_8151_0 0x7454
|
||||
#define PCI_DEVICE_ID_AMD_8131_APIC 0x7450
|
||||
|
||||
#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
|
||||
|
||||
#define PCI_VENDOR_ID_TRIDENT 0x1023
|
||||
#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000
|
||||
#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001
|
||||
|
Loading…
Reference in New Issue
Block a user