forked from luck/tmp_suning_uos_patched
timers/x86/hpet: Type adjustments
Standardize on bool instead of an inconsistent mixture of u8 and plain 'int'. Also use u32 or 'unsigned int' instead of 'unsigned long' when a 32-bit type suffices, generating slightly better code on x86-64. Signed-off-by: Jan Beulich <jbeulich@suse.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/5624E3A002000078000AC49A@prv-mh.provo.novell.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -63,10 +63,10 @@
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/* hpet memory map physical address */
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extern unsigned long hpet_address;
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extern unsigned long force_hpet_address;
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extern int boot_hpet_disable;
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extern bool boot_hpet_disable;
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extern u8 hpet_blockid;
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extern int hpet_force_user;
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extern u8 hpet_msi_disable;
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extern bool hpet_force_user;
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extern bool hpet_msi_disable;
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extern int is_hpet_enabled(void);
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extern int hpet_enable(void);
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extern void hpet_disable(void);
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@ -584,7 +584,7 @@ static void __init intel_graphics_stolen(int num, int slot, int func)
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static void __init force_disable_hpet(int num, int slot, int func)
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{
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#ifdef CONFIG_HPET_TIMER
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boot_hpet_disable = 1;
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boot_hpet_disable = true;
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pr_info("x86/hpet: Will disable the HPET for this platform because it's not reliable\n");
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#endif
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}
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@ -37,10 +37,10 @@
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*/
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unsigned long hpet_address;
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u8 hpet_blockid; /* OS timer block num */
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u8 hpet_msi_disable;
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bool hpet_msi_disable;
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#ifdef CONFIG_PCI_MSI
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static unsigned long hpet_num_timers;
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static unsigned int hpet_num_timers;
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#endif
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static void __iomem *hpet_virt_address;
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@ -86,9 +86,9 @@ static inline void hpet_clear_mapping(void)
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/*
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* HPET command line enable / disable
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*/
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int boot_hpet_disable;
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int hpet_force_user;
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static int hpet_verbose;
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bool boot_hpet_disable;
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bool hpet_force_user;
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static bool hpet_verbose;
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static int __init hpet_setup(char *str)
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{
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@ -98,11 +98,11 @@ static int __init hpet_setup(char *str)
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if (next)
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*next++ = 0;
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if (!strncmp("disable", str, 7))
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boot_hpet_disable = 1;
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boot_hpet_disable = true;
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if (!strncmp("force", str, 5))
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hpet_force_user = 1;
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hpet_force_user = true;
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if (!strncmp("verbose", str, 7))
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hpet_verbose = 1;
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hpet_verbose = true;
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str = next;
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}
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return 1;
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@ -111,7 +111,7 @@ __setup("hpet=", hpet_setup);
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static int __init disable_hpet(char *str)
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{
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boot_hpet_disable = 1;
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boot_hpet_disable = true;
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return 1;
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}
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__setup("nohpet", disable_hpet);
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@ -124,7 +124,7 @@ static inline int is_hpet_capable(void)
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/*
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* HPET timer interrupt enable / disable
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*/
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static int hpet_legacy_int_enabled;
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static bool hpet_legacy_int_enabled;
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/**
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* is_hpet_enabled - check whether the hpet timer interrupt is enabled
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@ -230,7 +230,7 @@ static struct clock_event_device hpet_clockevent;
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static void hpet_stop_counter(void)
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{
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unsigned long cfg = hpet_readl(HPET_CFG);
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u32 cfg = hpet_readl(HPET_CFG);
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cfg &= ~HPET_CFG_ENABLE;
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hpet_writel(cfg, HPET_CFG);
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}
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@ -272,7 +272,7 @@ static void hpet_enable_legacy_int(void)
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cfg |= HPET_CFG_LEGACY;
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hpet_writel(cfg, HPET_CFG);
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hpet_legacy_int_enabled = 1;
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hpet_legacy_int_enabled = true;
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}
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static void hpet_legacy_clockevent_register(void)
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@ -983,7 +983,7 @@ void hpet_disable(void)
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cfg = *hpet_boot_cfg;
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else if (hpet_legacy_int_enabled) {
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cfg &= ~HPET_CFG_LEGACY;
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hpet_legacy_int_enabled = 0;
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hpet_legacy_int_enabled = false;
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}
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cfg &= ~HPET_CFG_ENABLE;
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hpet_writel(cfg, HPET_CFG);
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@ -1121,8 +1121,7 @@ EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
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static void hpet_disable_rtc_channel(void)
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{
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unsigned long cfg;
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cfg = hpet_readl(HPET_T1_CFG);
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u32 cfg = hpet_readl(HPET_T1_CFG);
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cfg &= ~HPET_TN_ENABLE;
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hpet_writel(cfg, HPET_T1_CFG);
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}
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@ -524,7 +524,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E6XX_CU,
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*/
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static void force_disable_hpet_msi(struct pci_dev *unused)
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{
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hpet_msi_disable = 1;
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hpet_msi_disable = true;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
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