forked from luck/tmp_suning_uos_patched
intel-gtt: generic intel_fake_agp_fetch_size
This uses the new mappable gtt size detection from the previous patch. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -815,6 +815,25 @@ static int intel_gtt_init(void)
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return 0;
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}
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static int intel_fake_agp_fetch_size(void)
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{
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unsigned int aper_size;
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int i;
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int num_sizes = ARRAY_SIZE(intel_i830_sizes);
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aper_size = (intel_private.base.gtt_mappable_entries << PAGE_SHIFT)
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/ MB(1);
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for (i = 0; i < num_sizes; i++) {
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if (aper_size == intel_i830_sizes[i].size) {
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agp_bridge->current_size = intel_i830_sizes + i;
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return aper_size;
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}
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}
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return 0;
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}
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static void intel_i830_fini_flush(void)
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{
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kunmap(intel_private.i8xx_page);
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@ -906,36 +925,6 @@ static int intel_i830_free_gatt_table(struct agp_bridge_data *bridge)
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return 0;
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}
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static int intel_i830_fetch_size(void)
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{
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u16 gmch_ctrl;
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struct aper_size_info_fixed *values;
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values = A_SIZE_FIX(agp_bridge->driver->aperture_sizes);
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if (intel_private.bridge_dev->device != PCI_DEVICE_ID_INTEL_82830_HB &&
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intel_private.bridge_dev->device != PCI_DEVICE_ID_INTEL_82845G_HB) {
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/* 855GM/852GM/865G has 128MB aperture size */
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agp_bridge->current_size = (void *) values;
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agp_bridge->aperture_size_idx = 0;
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return values[0].size;
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}
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pci_read_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, &gmch_ctrl);
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if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
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agp_bridge->current_size = (void *) values;
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agp_bridge->aperture_size_idx = 0;
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return values[0].size;
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} else {
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agp_bridge->current_size = (void *) (values + 1);
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agp_bridge->aperture_size_idx = 1;
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return values[1].size;
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}
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return 0;
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}
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static int intel_i830_configure(void)
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{
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struct aper_size_info_fixed *current_size;
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@ -1283,24 +1272,6 @@ static int intel_i915_remove_entries(struct agp_memory *mem, off_t pg_start,
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* described in the spec of the MSAC registers is just changing of the
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* resource size.
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*/
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static int intel_i9xx_fetch_size(void)
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{
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int num_sizes = ARRAY_SIZE(intel_i830_sizes);
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int aper_size; /* size in megabytes */
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int i;
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aper_size = pci_resource_len(intel_private.pcidev, 2) / MB(1);
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for (i = 0; i < num_sizes; i++) {
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if (aper_size == intel_i830_sizes[i].size) {
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agp_bridge->current_size = intel_i830_sizes + i;
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return aper_size;
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}
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}
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return 0;
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}
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static int intel_i915_get_gtt_size(void)
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{
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int size;
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@ -1542,7 +1513,7 @@ static const struct agp_bridge_driver intel_830_driver = {
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.num_aperture_sizes = 4,
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.needs_scratch_page = true,
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.configure = intel_i830_configure,
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.fetch_size = intel_i830_fetch_size,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_i830_cleanup,
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.mask_memory = intel_i810_mask_memory,
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.masks = intel_i810_masks,
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@ -1569,7 +1540,7 @@ static const struct agp_bridge_driver intel_915_driver = {
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.num_aperture_sizes = 4,
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.needs_scratch_page = true,
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.configure = intel_i9xx_configure,
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.fetch_size = intel_i9xx_fetch_size,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_i915_cleanup,
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.mask_memory = intel_i810_mask_memory,
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.masks = intel_i810_masks,
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@ -1602,7 +1573,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
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.num_aperture_sizes = 4,
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.needs_scratch_page = true,
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.configure = intel_i9xx_configure,
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.fetch_size = intel_i9xx_fetch_size,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_i915_cleanup,
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.mask_memory = intel_i965_mask_memory,
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.masks = intel_i810_masks,
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@ -1635,7 +1606,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
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.num_aperture_sizes = 4,
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.needs_scratch_page = true,
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.configure = intel_i9xx_configure,
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.fetch_size = intel_i9xx_fetch_size,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_i915_cleanup,
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.mask_memory = intel_gen6_mask_memory,
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.masks = intel_gen6_masks,
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@ -1668,7 +1639,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
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.num_aperture_sizes = 4,
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.needs_scratch_page = true,
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.configure = intel_i9xx_configure,
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.fetch_size = intel_i9xx_fetch_size,
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.fetch_size = intel_fake_agp_fetch_size,
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.cleanup = intel_i915_cleanup,
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.mask_memory = intel_i965_mask_memory,
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.masks = intel_i810_masks,
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