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Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"

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This reverts commit b652896b02.

Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Simon Horman 2013-12-26 14:16:54 +09:00
parent 4d0810257a
commit 3effae8c26
2 changed files with 0 additions and 33 deletions
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20
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -495,26 +495,6 @@ R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
"rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
"i2c2", "i2c1", "i2c0";
};
mstp10_clks: mstp10_clks@e6150998 {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>,
<&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
<&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
<&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
<&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>,
<&mstp10_clks R8A7791_CLK_SSI>;
#clock-cells = <1>;
renesas,clock-indices = <
R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8
R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5
R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2
R8A7791_CLK_SSI1 R8A7791_CLK_SSI0
>;
clock-output-names =
"ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
"ssi4", "ssi3", "ssi2", "ssi1", "ssi0";
};
mstp11_clks: mstp11_clks@e615099c {
compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;

13
include/dt-bindings/clock/r8a7791-clock.h
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@ -103,19 +103,6 @@
#define R8A7791_CLK_I2C1 30
#define R8A7791_CLK_I2C0 31
/* MSTP10 */
#define R8A7791_CLK_SSI 5
#define R8A7791_CLK_SSI9 6
#define R8A7791_CLK_SSI8 7
#define R8A7791_CLK_SSI7 8
#define R8A7791_CLK_SSI6 9
#define R8A7791_CLK_SSI5 10
#define R8A7791_CLK_SSI4 11
#define R8A7791_CLK_SSI3 12
#define R8A7791_CLK_SSI2 13
#define R8A7791_CLK_SSI1 14
#define R8A7791_CLK_SSI0 15
/* MSTP11 */
#define R8A7791_CLK_SCIFA3 6
#define R8A7791_CLK_SCIFA4 7