forked from luck/tmp_suning_uos_patched
be2net: bug fix for flashing the BladeEngine3 ASIC
Now flashing both BE2 and BE3 devices is supported. From: Naresh G <nareshg@serverengines.com> Signed-off-by: Ajit Khaparde <ajitk@serverengines.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ajit Khaparde
David S. Miller
parent
e254f6ecae
commit
3f0d4560ae
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@ -1374,7 +1374,7 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
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u32 flash_type, u32 flash_opcode, u32 buf_size)
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{
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struct be_mcc_wrb *wrb;
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struct be_cmd_write_flashrom *req = cmd->va;
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struct be_cmd_write_flashrom *req;
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struct be_sge *sge;
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int status;
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@ -1408,7 +1408,8 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
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return status;
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}
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int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc)
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int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
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int offset)
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{
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struct be_mcc_wrb *wrb;
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struct be_cmd_write_flashrom *req;
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@ -1429,9 +1430,9 @@ int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc)
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be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
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OPCODE_COMMON_READ_FLASHROM, sizeof(*req)+4);
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req->params.op_type = cpu_to_le32(FLASHROM_TYPE_REDBOOT);
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req->params.op_type = cpu_to_le32(IMG_TYPE_REDBOOT);
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req->params.op_code = cpu_to_le32(FLASHROM_OPER_REPORT);
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req->params.offset = 0x3FFFC;
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req->params.offset = offset;
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req->params.data_buf_size = 0x4;
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status = be_mcc_notify_wait(adapter);
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@ -931,7 +931,8 @@ extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
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extern int be_cmd_write_flashrom(struct be_adapter *adapter,
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struct be_dma_mem *cmd, u32 flash_oper,
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u32 flash_opcode, u32 buf_size);
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extern int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc);
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int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
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int offset);
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extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
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struct be_dma_mem *nonemb_cmd);
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extern int be_cmd_fw_init(struct be_adapter *adapter);
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@ -99,6 +99,63 @@
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/* Number of entries posted */
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#define DB_MCCQ_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
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/* Flashrom related descriptors */
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#define IMAGE_TYPE_FIRMWARE 160
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#define IMAGE_TYPE_BOOTCODE 224
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#define IMAGE_TYPE_OPTIONROM 32
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#define NUM_FLASHDIR_ENTRIES 32
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#define IMG_TYPE_ISCSI_ACTIVE 0
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#define IMG_TYPE_REDBOOT 1
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#define IMG_TYPE_BIOS 2
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#define IMG_TYPE_PXE_BIOS 3
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#define IMG_TYPE_FCOE_BIOS 8
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#define IMG_TYPE_ISCSI_BACKUP 9
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#define IMG_TYPE_FCOE_FW_ACTIVE 10
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#define IMG_TYPE_FCOE_FW_BACKUP 11
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#define IMG_TYPE_NCSI_BITFILE 13
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#define IMG_TYPE_NCSI_8051 14
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#define FLASHROM_OPER_FLASH 1
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#define FLASHROM_OPER_SAVE 2
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#define FLASHROM_OPER_REPORT 4
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#define FLASH_IMAGE_MAX_SIZE_g2 (1310720) /* Max firmware image sz */
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#define FLASH_BIOS_IMAGE_MAX_SIZE_g2 (262144) /* Max OPTION ROM img sz */
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#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 (262144) /* Max Redboot image sz */
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#define FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max fw image size */
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#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM img sz */
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#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */
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#define FLASH_NCSI_MAGIC (0x16032009)
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#define FLASH_NCSI_DISABLED (0)
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#define FLASH_NCSI_ENABLED (1)
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#define FLASH_NCSI_BITFILE_HDR_OFFSET (0x600000)
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/* Offsets for components on Flash. */
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#define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 (1048576)
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#define FLASH_iSCSI_BACKUP_IMAGE_START_g2 (2359296)
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#define FLASH_FCoE_PRIMARY_IMAGE_START_g2 (3670016)
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#define FLASH_FCoE_BACKUP_IMAGE_START_g2 (4980736)
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#define FLASH_iSCSI_BIOS_START_g2 (7340032)
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#define FLASH_PXE_BIOS_START_g2 (7864320)
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#define FLASH_FCoE_BIOS_START_g2 (524288)
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#define FLASH_REDBOOT_START_g2 (0)
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#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152)
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#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304)
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#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456)
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#define FLASH_FCoE_BACKUP_IMAGE_START_g3 (8388608)
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#define FLASH_iSCSI_BIOS_START_g3 (12582912)
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#define FLASH_PXE_BIOS_START_g3 (13107200)
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#define FLASH_FCoE_BIOS_START_g3 (13631488)
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#define FLASH_REDBOOT_START_g3 (262144)
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/*
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* BE descriptors: host memory data structures whose formats
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* are hardwired in BE silicon.
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@ -107,6 +164,7 @@
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#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
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#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
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#define EQ_ENTRY_RES_ID_SHIFT 16
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struct be_eq_entry {
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u32 evt;
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};
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@ -221,41 +279,6 @@ struct be_eth_rx_compl {
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u32 dw[4];
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};
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/* Flashrom related descriptors */
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#define IMAGE_TYPE_FIRMWARE 160
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#define IMAGE_TYPE_BOOTCODE 224
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#define IMAGE_TYPE_OPTIONROM 32
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#define NUM_FLASHDIR_ENTRIES 32
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#define FLASHROM_TYPE_ISCSI_ACTIVE 0
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#define FLASHROM_TYPE_REDBOOT 1
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#define FLASHROM_TYPE_BIOS 2
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#define FLASHROM_TYPE_PXE_BIOS 3
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#define FLASHROM_TYPE_FCOE_BIOS 8
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#define FLASHROM_TYPE_ISCSI_BACKUP 9
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#define FLASHROM_TYPE_FCOE_FW_ACTIVE 10
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#define FLASHROM_TYPE_FCOE_FW_BACKUP 11
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#define FLASHROM_OPER_FLASH 1
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#define FLASHROM_OPER_SAVE 2
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#define FLASHROM_OPER_REPORT 4
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#define FLASH_IMAGE_MAX_SIZE (1310720) /* Max firmware image size */
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#define FLASH_BIOS_IMAGE_MAX_SIZE (262144) /* Max OPTION ROM image sz */
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#define FLASH_REDBOOT_IMAGE_MAX_SIZE (262144) /* Max redboot image sz */
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/* Offsets for components on Flash. */
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#define FLASH_iSCSI_PRIMARY_IMAGE_START (1048576)
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#define FLASH_iSCSI_BACKUP_IMAGE_START (2359296)
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#define FLASH_FCoE_PRIMARY_IMAGE_START (3670016)
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#define FLASH_FCoE_BACKUP_IMAGE_START (4980736)
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#define FLASH_iSCSI_BIOS_START (7340032)
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#define FLASH_PXE_BIOS_START (7864320)
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#define FLASH_FCoE_BIOS_START (524288)
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#define FLASH_REDBOOT_START (32768)
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#define FLASH_REDBOOT_ISM_START (0)
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struct controller_id {
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u32 vendor;
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u32 device;
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@ -263,7 +286,20 @@ struct controller_id {
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u32 subdevice;
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};
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struct flash_file_hdr {
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struct flash_comp {
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unsigned long offset;
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int optype;
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int size;
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};
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struct image_hdr {
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u32 imageid;
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u32 imageoffset;
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u32 imagelength;
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u32 image_checksum;
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u8 image_version[32];
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};
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struct flash_file_hdr_g2 {
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u8 sign[32];
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u32 cksum;
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u32 antidote;
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@ -275,6 +311,17 @@ struct flash_file_hdr {
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u8 build[24];
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};
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struct flash_file_hdr_g3 {
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u8 sign[52];
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u8 ufi_version[4];
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u32 file_len;
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u32 cksum;
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u32 antidote;
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u32 num_imgs;
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u8 build[24];
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u8 rsvd[32];
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};
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struct flash_section_hdr {
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u32 format_rev;
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u32 cksum;
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@ -1798,15 +1798,19 @@ char flash_cookie[2][16] = {"*** SE FLAS",
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"H DIRECTORY *** "};
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static bool be_flash_redboot(struct be_adapter *adapter,
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const u8 *p)
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const u8 *p, u32 img_start, int image_size,
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int hdr_size)
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{
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u32 crc_offset;
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u8 flashed_crc[4];
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int status;
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crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
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+ sizeof(struct flash_file_hdr) - 32*1024;
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crc_offset = hdr_size + img_start + image_size - 4;
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p += crc_offset;
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status = be_cmd_get_flash_crc(adapter, flashed_crc);
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status = be_cmd_get_flash_crc(adapter, flashed_crc,
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(img_start + image_size - 4));
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if (status) {
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dev_err(&adapter->pdev->dev,
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"could not get crc from flash, not flashing redboot\n");
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@ -1818,102 +1822,124 @@ static bool be_flash_redboot(struct be_adapter *adapter,
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return false;
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else
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return true;
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}
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static int be_flash_image(struct be_adapter *adapter,
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static int be_flash_data(struct be_adapter *adapter,
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const struct firmware *fw,
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struct be_dma_mem *flash_cmd, u32 flash_type)
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struct be_dma_mem *flash_cmd, int num_of_images)
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{
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int status;
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u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
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int status = 0, i, filehdr_size = 0;
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u32 total_bytes = 0, flash_op;
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int num_bytes;
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const u8 *p = fw->data;
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struct be_cmd_write_flashrom *req = flash_cmd->va;
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struct flash_comp *pflashcomp;
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switch (flash_type) {
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case FLASHROM_TYPE_ISCSI_ACTIVE:
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image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
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image_size = FLASH_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_ISCSI_BACKUP:
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image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
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image_size = FLASH_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_FCOE_FW_ACTIVE:
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image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
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image_size = FLASH_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_FCOE_FW_BACKUP:
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image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
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image_size = FLASH_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_BIOS:
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image_offset = FLASH_iSCSI_BIOS_START;
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image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_FCOE_BIOS:
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image_offset = FLASH_FCoE_BIOS_START;
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image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_PXE_BIOS:
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image_offset = FLASH_PXE_BIOS_START;
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image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
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break;
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case FLASHROM_TYPE_REDBOOT:
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if (!be_flash_redboot(adapter, fw->data))
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return 0;
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image_offset = FLASH_REDBOOT_ISM_START;
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image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
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break;
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default:
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return 0;
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struct flash_comp gen3_flash_types[8] = {
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{ FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g3},
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{ FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
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FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
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{ FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g3},
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{ FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g3},
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{ FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g3},
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{ FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
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FLASH_IMAGE_MAX_SIZE_g3},
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{ FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g3},
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{ FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
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FLASH_IMAGE_MAX_SIZE_g3}
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};
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struct flash_comp gen2_flash_types[8] = {
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{ FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g2},
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{ FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
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FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
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{ FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g2},
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{ FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g2},
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{ FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
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FLASH_BIOS_IMAGE_MAX_SIZE_g2},
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{ FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
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FLASH_IMAGE_MAX_SIZE_g2},
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{ FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
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FLASH_IMAGE_MAX_SIZE_g2},
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{ FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
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FLASH_IMAGE_MAX_SIZE_g2}
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};
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if (adapter->generation == BE_GEN3) {
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pflashcomp = gen3_flash_types;
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filehdr_size = sizeof(struct flash_file_hdr_g3);
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} else {
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pflashcomp = gen2_flash_types;
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filehdr_size = sizeof(struct flash_file_hdr_g2);
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}
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p += sizeof(struct flash_file_hdr) + image_offset;
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if (p + image_size > fw->data + fw->size)
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for (i = 0; i < 8; i++) {
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if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
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(!be_flash_redboot(adapter, fw->data,
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pflashcomp[i].offset, pflashcomp[i].size,
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filehdr_size)))
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continue;
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p = fw->data;
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p += filehdr_size + pflashcomp[i].offset
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+ (num_of_images * sizeof(struct image_hdr));
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if (p + pflashcomp[i].size > fw->data + fw->size)
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return -1;
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total_bytes = pflashcomp[i].size;
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while (total_bytes) {
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if (total_bytes > 32*1024)
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num_bytes = 32*1024;
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else
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num_bytes = total_bytes;
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total_bytes -= num_bytes;
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total_bytes = image_size;
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while (total_bytes) {
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if (total_bytes > 32*1024)
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num_bytes = 32*1024;
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else
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num_bytes = total_bytes;
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total_bytes -= num_bytes;
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if (!total_bytes)
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flash_op = FLASHROM_OPER_FLASH;
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else
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flash_op = FLASHROM_OPER_SAVE;
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memcpy(req->params.data_buf, p, num_bytes);
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p += num_bytes;
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status = be_cmd_write_flashrom(adapter, flash_cmd,
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flash_type, flash_op, num_bytes);
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if (status) {
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dev_err(&adapter->pdev->dev,
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"cmd to write to flash rom failed. type/op %d/%d\n",
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flash_type, flash_op);
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return -1;
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if (!total_bytes)
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flash_op = FLASHROM_OPER_FLASH;
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else
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flash_op = FLASHROM_OPER_SAVE;
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memcpy(req->params.data_buf, p, num_bytes);
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p += num_bytes;
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status = be_cmd_write_flashrom(adapter, flash_cmd,
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pflashcomp[i].optype, flash_op, num_bytes);
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if (status) {
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dev_err(&adapter->pdev->dev,
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"cmd to write to flash rom failed.\n");
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return -1;
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}
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yield();
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}
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yield();
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}
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return 0;
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}
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static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
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{
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if (fhdr == NULL)
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return 0;
|
||||
if (fhdr->build[0] == '3')
|
||||
return BE_GEN3;
|
||||
else if (fhdr->build[0] == '2')
|
||||
return BE_GEN2;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
int be_load_fw(struct be_adapter *adapter, u8 *func)
|
||||
{
|
||||
char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
|
||||
const struct firmware *fw;
|
||||
struct flash_file_hdr *fhdr;
|
||||
struct flash_section_info *fsec = NULL;
|
||||
struct flash_file_hdr_g2 *fhdr;
|
||||
struct flash_file_hdr_g3 *fhdr3;
|
||||
struct image_hdr *img_hdr_ptr = NULL;
|
||||
struct be_dma_mem flash_cmd;
|
||||
int status;
|
||||
int status, i = 0;
|
||||
const u8 *p;
|
||||
bool entry_found = false;
|
||||
int flash_type;
|
||||
char fw_ver[FW_VER_LEN];
|
||||
char fw_cfg;
|
||||
|
||||
|
|
@ -1931,34 +1957,9 @@ int be_load_fw(struct be_adapter *adapter, u8 *func)
|
|||
goto fw_exit;
|
||||
|
||||
p = fw->data;
|
||||
fhdr = (struct flash_file_hdr *) p;
|
||||
if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"Firmware(%s) load error (signature did not match)\n",
|
||||
fw_file);
|
||||
status = -1;
|
||||
goto fw_exit;
|
||||
}
|
||||
|
||||
fhdr = (struct flash_file_hdr_g2 *) p;
|
||||
dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
|
||||
|
||||
p += sizeof(struct flash_file_hdr);
|
||||
while (p < (fw->data + fw->size)) {
|
||||
fsec = (struct flash_section_info *)p;
|
||||
if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
|
||||
entry_found = true;
|
||||
break;
|
||||
}
|
||||
p += 32;
|
||||
}
|
||||
|
||||
if (!entry_found) {
|
||||
status = -1;
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"Flash cookie not found in firmware image\n");
|
||||
goto fw_exit;
|
||||
}
|
||||
|
||||
flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
|
||||
flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
|
||||
&flash_cmd.dma);
|
||||
|
|
@ -1969,12 +1970,26 @@ int be_load_fw(struct be_adapter *adapter, u8 *func)
|
|||
goto fw_exit;
|
||||
}
|
||||
|
||||
for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
|
||||
flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
|
||||
status = be_flash_image(adapter, fw, &flash_cmd,
|
||||
flash_type);
|
||||
if (status)
|
||||
break;
|
||||
if ((adapter->generation == BE_GEN3) &&
|
||||
(get_ufigen_type(fhdr) == BE_GEN3)) {
|
||||
fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
|
||||
for (i = 0; i < fhdr3->num_imgs; i++) {
|
||||
img_hdr_ptr = (struct image_hdr *) (fw->data +
|
||||
(sizeof(struct flash_file_hdr_g3) +
|
||||
i * sizeof(struct image_hdr)));
|
||||
if (img_hdr_ptr->imageid == 1) {
|
||||
status = be_flash_data(adapter, fw,
|
||||
&flash_cmd, fhdr3->num_imgs);
|
||||
}
|
||||
|
||||
}
|
||||
} else if ((adapter->generation == BE_GEN2) &&
|
||||
(get_ufigen_type(fhdr) == BE_GEN2)) {
|
||||
status = be_flash_data(adapter, fw, &flash_cmd, 0);
|
||||
} else {
|
||||
dev_err(&adapter->pdev->dev,
|
||||
"UFI and Interface are not compatible for flashing\n");
|
||||
status = -1;
|
||||
}
|
||||
|
||||
pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user