forked from luck/tmp_suning_uos_patched
gpiolib: let gpiochip_add_pin_range() specify offset
Like with commit 3c739ad0df
it is not always enough to specify all the pins of a gpio_chip
from offset zero to be added to a pin map range, since the
mapping from GPIO to pin controller may not be linear at all,
but need to be broken into a few consecutive sub-ranges or
1-pin entries for complicated cases. The ranges may also be
sparse.
This alters the signature of the function to accept offsets
into both the GPIO-chip local pinspace and the pin controller
local pinspace.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
5212d096cb
commit
3f0f867060
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@ -238,8 +238,20 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
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if (!pctldev)
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break;
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/*
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* This assumes that the n GPIO pins are consecutive in the
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* GPIO number space, and that the pins are also consecutive
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* in their local number space. Currently it is not possible
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* to add different ranges for one and the same GPIO chip,
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* as the code assumes that we have one consecutive range
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* on both, mapping 1-to-1.
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*
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* TODO: make the OF bindings handle multiple sparse ranges
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* on the same GPIO chip.
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*/
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ret = gpiochip_add_pin_range(chip,
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pinctrl_dev_get_name(pctldev),
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0, /* offset in gpiochip */
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pinspec.args[0],
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pinspec.args[1]);
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@ -1187,24 +1187,45 @@ EXPORT_SYMBOL_GPL(gpiochip_find);
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#ifdef CONFIG_PINCTRL
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/**
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* gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
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* @chip: the gpiochip to add the range for
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* @pinctrl_name: the dev_name() of the pin controller to map to
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* @offset: the start offset in the current gpio_chip number space
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* @pin_base: the start offset in the pin controller number space
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* @npins: the number of pins from the offset of each pin space (GPIO and
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* pin controller) to accumulate in this range
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*/
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int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int pin_base, unsigned int npins)
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unsigned int offset, unsigned int pin_base,
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unsigned int npins)
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{
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struct gpio_pin_range *pin_range;
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pin_range = devm_kzalloc(chip->dev, sizeof(*pin_range), GFP_KERNEL);
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pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
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if (!pin_range) {
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pr_err("%s: GPIO chip: failed to allocate pin ranges\n",
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chip->label);
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return -ENOMEM;
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}
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/* Use local offset as range ID */
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pin_range->range.id = offset;
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pin_range->range.gc = chip;
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pin_range->range.name = chip->label;
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pin_range->range.base = chip->base;
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pin_range->range.base = chip->base + offset;
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pin_range->range.pin_base = pin_base;
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pin_range->range.npins = npins;
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pin_range->pctldev = find_pinctrl_and_add_gpio_range(pinctl_name,
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&pin_range->range);
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if (!pin_range->pctldev) {
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pr_err("%s: GPIO chip: could not create pin range\n",
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chip->label);
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kfree(pin_range);
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}
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pr_debug("%s: GPIO chip: created GPIO range %d->%d ==> PIN %d->%d\n",
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chip->label, offset, offset + npins - 1,
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pin_base, pin_base + npins - 1);
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list_add_tail(&pin_range->node, &chip->pin_ranges);
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@ -1212,6 +1233,10 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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}
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EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
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/**
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* gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
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* @chip: the chip to remove all the mappings for
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*/
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void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
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{
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struct gpio_pin_range *pin_range, *tmp;
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@ -1220,6 +1245,7 @@ void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
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list_del(&pin_range->node);
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pinctrl_remove_gpio_range(pin_range->pctldev,
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&pin_range->range);
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kfree(pin_range);
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}
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}
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EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
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@ -283,14 +283,16 @@ struct gpio_pin_range {
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};
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int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int pin_base, unsigned int npins);
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unsigned int offset, unsigned int pin_base,
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unsigned int npins);
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void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
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#else
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static inline int
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gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int pin_base, unsigned int npins)
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unsigned int offset, unsigned int pin_base,
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unsigned int npins)
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{
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return 0;
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}
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@ -233,7 +233,8 @@ static inline int irq_to_gpio(unsigned irq)
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static inline int
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gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int pin_base, unsigned int npins)
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unsigned int offset, unsigned int pin_base,
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unsigned int npins)
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{
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WARN_ON(1);
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return -EINVAL;
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