forked from luck/tmp_suning_uos_patched
gpu: host1x: Add IOMMU support
Add support for the Host1x unit to be located behind an IOMMU. This is required when gather buffers may be allocated non-contiguously in physical memory, as can be the case when TegraDRM is also using the IOMMU. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Mikko Perttunen
Thierry Reding
parent
8cadb01d2c
commit
404bfb78da
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@ -51,9 +51,15 @@ static void host1x_pushbuffer_destroy(struct push_buffer *pb)
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struct host1x_cdma *cdma = pb_to_cdma(pb);
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struct host1x *host1x = cdma_to_host1x(cdma);
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if (pb->phys != 0)
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dma_free_wc(host1x->dev, pb->size_bytes + 4, pb->mapped,
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pb->phys);
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if (!pb->phys)
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return;
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if (host1x->domain) {
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iommu_unmap(host1x->domain, pb->dma, pb->alloc_size);
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free_iova(&host1x->iova, iova_pfn(&host1x->iova, pb->dma));
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}
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dma_free_wc(host1x->dev, pb->alloc_size, pb->mapped, pb->phys);
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pb->mapped = NULL;
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pb->phys = 0;
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@ -66,28 +72,64 @@ static int host1x_pushbuffer_init(struct push_buffer *pb)
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{
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struct host1x_cdma *cdma = pb_to_cdma(pb);
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struct host1x *host1x = cdma_to_host1x(cdma);
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struct iova *alloc;
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u32 size;
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int err;
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pb->mapped = NULL;
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pb->phys = 0;
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pb->size_bytes = HOST1X_PUSHBUFFER_SLOTS * 8;
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pb->size = HOST1X_PUSHBUFFER_SLOTS * 8;
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size = pb->size + 4;
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/* initialize buffer pointers */
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pb->fence = pb->size_bytes - 8;
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pb->fence = pb->size - 8;
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pb->pos = 0;
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/* allocate and map pushbuffer memory */
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pb->mapped = dma_alloc_wc(host1x->dev, pb->size_bytes + 4, &pb->phys,
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GFP_KERNEL);
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if (!pb->mapped)
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goto fail;
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if (host1x->domain) {
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unsigned long shift;
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size = iova_align(&host1x->iova, size);
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pb->mapped = dma_alloc_wc(host1x->dev, size, &pb->phys,
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GFP_KERNEL);
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if (!pb->mapped)
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return -ENOMEM;
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shift = iova_shift(&host1x->iova);
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alloc = alloc_iova(&host1x->iova, size >> shift,
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host1x->iova_end >> shift, true);
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if (!alloc) {
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err = -ENOMEM;
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goto iommu_free_mem;
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}
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pb->dma = iova_dma_addr(&host1x->iova, alloc);
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err = iommu_map(host1x->domain, pb->dma, pb->phys, size,
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IOMMU_READ);
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if (err)
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goto iommu_free_iova;
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} else {
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pb->mapped = dma_alloc_wc(host1x->dev, size, &pb->phys,
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GFP_KERNEL);
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if (!pb->mapped)
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return -ENOMEM;
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pb->dma = pb->phys;
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}
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pb->alloc_size = size;
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host1x_hw_pushbuffer_init(host1x, pb);
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return 0;
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fail:
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host1x_pushbuffer_destroy(pb);
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return -ENOMEM;
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iommu_free_iova:
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__free_iova(&host1x->iova, alloc);
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iommu_free_mem:
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dma_free_wc(host1x->dev, pb->alloc_size, pb->mapped, pb->phys);
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return err;
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}
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/*
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@ -101,7 +143,7 @@ static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2)
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WARN_ON(pb->pos == pb->fence);
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*(p++) = op1;
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*(p++) = op2;
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pb->pos = (pb->pos + 8) & (pb->size_bytes - 1);
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pb->pos = (pb->pos + 8) & (pb->size - 1);
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}
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/*
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@ -111,7 +153,7 @@ static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2)
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static void host1x_pushbuffer_pop(struct push_buffer *pb, unsigned int slots)
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{
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/* Advance the next write position */
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pb->fence = (pb->fence + slots * 8) & (pb->size_bytes - 1);
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pb->fence = (pb->fence + slots * 8) & (pb->size - 1);
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}
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/*
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@ -119,7 +161,7 @@ static void host1x_pushbuffer_pop(struct push_buffer *pb, unsigned int slots)
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*/
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static u32 host1x_pushbuffer_space(struct push_buffer *pb)
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{
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return ((pb->fence - pb->pos) & (pb->size_bytes - 1)) / 8;
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return ((pb->fence - pb->pos) & (pb->size - 1)) / 8;
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}
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/*
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@ -43,10 +43,12 @@ struct host1x_job;
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struct push_buffer {
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void *mapped; /* mapped pushbuffer memory */
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dma_addr_t phys; /* physical address of pushbuffer */
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dma_addr_t dma; /* device address of pushbuffer */
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phys_addr_t phys; /* physical address of pushbuffer */
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u32 fence; /* index we've written */
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u32 pos; /* index to write to */
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u32 size_bytes;
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u32 size;
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u32 alloc_size;
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};
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struct buffer_timeout {
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@ -27,6 +27,7 @@
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#define CREATE_TRACE_POINTS
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#include <trace/events/host1x.h>
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#undef CREATE_TRACE_POINTS
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#include "bus.h"
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#include "dev.h"
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@ -168,16 +169,37 @@ static int host1x_probe(struct platform_device *pdev)
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return err;
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}
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if (iommu_present(&platform_bus_type)) {
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struct iommu_domain_geometry *geometry;
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unsigned long order;
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host->domain = iommu_domain_alloc(&platform_bus_type);
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if (!host->domain)
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return -ENOMEM;
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err = iommu_attach_device(host->domain, &pdev->dev);
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if (err)
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goto fail_free_domain;
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geometry = &host->domain->geometry;
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order = __ffs(host->domain->pgsize_bitmap);
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init_iova_domain(&host->iova, 1UL << order,
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geometry->aperture_start >> order,
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geometry->aperture_end >> order);
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host->iova_end = geometry->aperture_end;
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}
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err = host1x_channel_list_init(host);
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if (err) {
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dev_err(&pdev->dev, "failed to initialize channel list\n");
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return err;
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goto fail_detach_device;
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}
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err = clk_prepare_enable(host->clk);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to enable clock\n");
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return err;
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goto fail_detach_device;
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}
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err = host1x_syncpt_init(host);
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@ -206,6 +228,15 @@ static int host1x_probe(struct platform_device *pdev)
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host1x_syncpt_deinit(host);
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fail_unprepare_disable:
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clk_disable_unprepare(host->clk);
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fail_detach_device:
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if (host->domain) {
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put_iova_domain(&host->iova);
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iommu_detach_device(host->domain, &pdev->dev);
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}
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fail_free_domain:
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if (host->domain)
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iommu_domain_free(host->domain);
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return err;
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}
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@ -218,6 +249,12 @@ static int host1x_remove(struct platform_device *pdev)
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host1x_syncpt_deinit(host);
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clk_disable_unprepare(host->clk);
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if (host->domain) {
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put_iova_domain(&host->iova);
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iommu_detach_device(host->domain, &pdev->dev);
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iommu_domain_free(host->domain);
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}
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return 0;
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}
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@ -19,6 +19,8 @@
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#include <linux/platform_device.h>
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#include <linux/device.h>
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#include <linux/iommu.h>
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#include <linux/iova.h>
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#include "channel.h"
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#include "syncpt.h"
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@ -108,6 +110,10 @@ struct host1x {
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struct device *dev;
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struct clk *clk;
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struct iommu_domain *domain;
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struct iova_domain iova;
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dma_addr_t iova_end;
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struct mutex intr_mutex;
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int intr_syncpt_irq;
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@ -30,7 +30,7 @@
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*/
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static void push_buffer_init(struct push_buffer *pb)
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{
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*(u32 *)(pb->mapped + pb->size_bytes) = host1x_opcode_restart(0);
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*(u32 *)(pb->mapped + pb->size) = host1x_opcode_restart(0);
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}
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/*
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@ -55,8 +55,8 @@ static void cdma_timeout_cpu_incr(struct host1x_cdma *cdma, u32 getptr,
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*(p++) = HOST1X_OPCODE_NOP;
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*(p++) = HOST1X_OPCODE_NOP;
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dev_dbg(host1x->dev, "%s: NOP at %pad+%#x\n", __func__,
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&pb->phys, getptr);
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getptr = (getptr + 8) & (pb->size_bytes - 1);
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&pb->dma, getptr);
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getptr = (getptr + 8) & (pb->size - 1);
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}
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wmb();
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@ -78,10 +78,9 @@ static void cdma_start(struct host1x_cdma *cdma)
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HOST1X_CHANNEL_DMACTRL);
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/* set base, put and end pointer */
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host1x_ch_writel(ch, cdma->push_buffer.phys, HOST1X_CHANNEL_DMASTART);
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host1x_ch_writel(ch, cdma->push_buffer.dma, HOST1X_CHANNEL_DMASTART);
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host1x_ch_writel(ch, cdma->push_buffer.pos, HOST1X_CHANNEL_DMAPUT);
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host1x_ch_writel(ch, cdma->push_buffer.phys +
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cdma->push_buffer.size_bytes + 4,
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host1x_ch_writel(ch, cdma->push_buffer.dma + cdma->push_buffer.size + 4,
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HOST1X_CHANNEL_DMAEND);
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/* reset GET */
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@ -115,9 +114,8 @@ static void cdma_timeout_restart(struct host1x_cdma *cdma, u32 getptr)
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HOST1X_CHANNEL_DMACTRL);
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/* set base, end pointer (all of memory) */
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host1x_ch_writel(ch, cdma->push_buffer.phys, HOST1X_CHANNEL_DMASTART);
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host1x_ch_writel(ch, cdma->push_buffer.phys +
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cdma->push_buffer.size_bytes,
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host1x_ch_writel(ch, cdma->push_buffer.dma, HOST1X_CHANNEL_DMASTART);
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host1x_ch_writel(ch, cdma->push_buffer.dma + cdma->push_buffer.size,
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HOST1X_CHANNEL_DMAEND);
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/* set GET, by loading the value in PUT (then reset GET) */
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@ -174,9 +174,10 @@ static int do_waitchks(struct host1x_job *job, struct host1x *host,
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return 0;
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}
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static unsigned int pin_job(struct host1x_job *job)
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static unsigned int pin_job(struct host1x *host, struct host1x_job *job)
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{
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unsigned int i;
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int err;
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job->num_unpins = 0;
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@ -186,12 +187,16 @@ static unsigned int pin_job(struct host1x_job *job)
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dma_addr_t phys_addr;
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reloc->target.bo = host1x_bo_get(reloc->target.bo);
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if (!reloc->target.bo)
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if (!reloc->target.bo) {
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err = -EINVAL;
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goto unpin;
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}
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phys_addr = host1x_bo_pin(reloc->target.bo, &sgt);
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if (!phys_addr)
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if (!phys_addr) {
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err = -EINVAL;
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goto unpin;
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}
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job->addr_phys[job->num_unpins] = phys_addr;
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job->unpins[job->num_unpins].bo = reloc->target.bo;
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@ -201,28 +206,67 @@ static unsigned int pin_job(struct host1x_job *job)
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for (i = 0; i < job->num_gathers; i++) {
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struct host1x_job_gather *g = &job->gathers[i];
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size_t gather_size = 0;
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struct scatterlist *sg;
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struct sg_table *sgt;
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dma_addr_t phys_addr;
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unsigned long shift;
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struct iova *alloc;
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unsigned int j;
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g->bo = host1x_bo_get(g->bo);
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if (!g->bo)
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if (!g->bo) {
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err = -EINVAL;
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goto unpin;
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}
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phys_addr = host1x_bo_pin(g->bo, &sgt);
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if (!phys_addr)
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if (!phys_addr) {
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err = -EINVAL;
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goto unpin;
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}
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if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) {
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for_each_sg(sgt->sgl, sg, sgt->nents, j)
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gather_size += sg->length;
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gather_size = iova_align(&host->iova, gather_size);
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shift = iova_shift(&host->iova);
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alloc = alloc_iova(&host->iova, gather_size >> shift,
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host->iova_end >> shift, true);
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if (!alloc) {
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err = -ENOMEM;
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goto unpin;
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}
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err = iommu_map_sg(host->domain,
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iova_dma_addr(&host->iova, alloc),
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sgt->sgl, sgt->nents, IOMMU_READ);
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if (err == 0) {
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__free_iova(&host->iova, alloc);
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err = -EINVAL;
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goto unpin;
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}
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job->addr_phys[job->num_unpins] =
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iova_dma_addr(&host->iova, alloc);
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job->unpins[job->num_unpins].size = gather_size;
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} else {
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job->addr_phys[job->num_unpins] = phys_addr;
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}
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job->gather_addr_phys[i] = job->addr_phys[job->num_unpins];
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job->addr_phys[job->num_unpins] = phys_addr;
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job->unpins[job->num_unpins].bo = g->bo;
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job->unpins[job->num_unpins].sgt = sgt;
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job->num_unpins++;
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}
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return job->num_unpins;
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return 0;
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unpin:
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host1x_job_unpin(job);
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return 0;
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return err;
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}
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static int do_relocs(struct host1x_job *job, struct host1x_bo *cmdbuf)
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@ -525,8 +569,8 @@ int host1x_job_pin(struct host1x_job *job, struct device *dev)
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host1x_syncpt_load(host->syncpt + i);
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/* pin memory */
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err = pin_job(job);
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if (!err)
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err = pin_job(host, job);
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if (err)
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goto out;
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/* patch gathers */
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@ -572,11 +616,19 @@ EXPORT_SYMBOL(host1x_job_pin);
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void host1x_job_unpin(struct host1x_job *job)
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{
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struct host1x *host = dev_get_drvdata(job->channel->dev->parent);
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unsigned int i;
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for (i = 0; i < job->num_unpins; i++) {
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struct host1x_job_unpin_data *unpin = &job->unpins[i];
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if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) {
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iommu_unmap(host->domain, job->addr_phys[i],
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unpin->size);
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free_iova(&host->iova,
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iova_pfn(&host->iova, job->addr_phys[i]));
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}
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host1x_bo_unpin(unpin->bo, unpin->sgt);
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host1x_bo_put(unpin->bo);
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}
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@ -44,6 +44,7 @@ struct host1x_waitchk {
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struct host1x_job_unpin_data {
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struct host1x_bo *bo;
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struct sg_table *sgt;
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size_t size;
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};
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/*
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