forked from luck/tmp_suning_uos_patched
irqchip updates for 4.15, take #4
- A core irq fix for legacy cases where the irq trigger is not reported by firmware - A couple of GICv3/4 fixes (Kconfig, of-node refcount, error handling) - Trivial pr_err fixes -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAloJ2UYVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDtkcP/i2HrgT5CmoA315h5HLXfFImxZwg YG7ti3zqu1TM7HXNlfBgSltqiU5UgYOd2KjgUR+w30t1239DwxVdtoy6ZgGWXlfe xmHlXAiEDkqaAV3P/RHKkl8xRDkyWhKmfY1ym/So0J68EPytuiZiT4wJZO39u/xk Gi2fW38gywl4bEb9MA48noEnkNkr93DjJfFyiPxPYiAaWeFRoP+X5l171kTpCdSv sT5hfQvfsz7mQZVecMBwGg6QuWnlUplkzPb4lNhuk/tJTU97vf3Py8abzeiGqBMa 5NoH9PUMZs0L8kv6DgR2DEOmhmmk0+mwO7VWVT3eVtYoxSS8oW0i2OzgB9kCOy8+ LZi+M0fMSL6hiAgwlV5YrHYvsVl2rGjCNAqC+q2ggpW4XH9Kql2caki331mGqAyr qDeI0SWaABz5c9ajtsfQ78T0FE70xwIJ5TT1RmtKt2LFCpJjBacjK3vUST2ypIrF k0AJTmBwEefKNvxTrjkZtenblCVo92lT+boAv7HuI612NicVSBEsK7S+96kGlGMw KNi+cwGriJRWIbsn+VMpLFGyPgEmWQ1p/4Z/tkwSevqOl/k8KrNw6+VoyDS1PmJU gIQ0hh8wMnm2l9VGJARc0+pHKr0KYN52j+jZI5+OGNKKAZ0jGYI4t2JiemtOwmet q2KNdm6mvBYUYirj =/8DQ -----END PGP SIGNATURE----- Merge tag 'irqchip-4.15-4' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip updates for 4.15, take #4 from Marc Zyngier - A core irq fix for legacy cases where the irq trigger is not reported by firmware - A couple of GICv3/4 fixes (Kconfig, of-node refcount, error handling) - Trivial pr_err fixes
This commit is contained in:
commit
41cc30412d
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@ -41,8 +41,15 @@ config ARM_GIC_V3
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config ARM_GIC_V3_ITS
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bool
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select GENERIC_MSI_IRQ_DOMAIN
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default ARM_GIC_V3
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config ARM_GIC_V3_ITS_PCI
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bool
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depends on ARM_GIC_V3_ITS
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depends on PCI
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depends on PCI_MSI
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default ARM_GIC_V3_ITS
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config ARM_NVIC
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bool
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@ -30,7 +30,8 @@ obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o
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obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o
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obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
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obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
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obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
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obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o
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obj-$(CONFIG_PARTITION_PERCPU) += irq-partition-percpu.o
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obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
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obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
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@ -1103,18 +1103,18 @@ static void __init gic_populate_ppi_partitions(struct device_node *gic_node)
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int nr_parts;
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struct partition_affinity *parts;
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parts_node = of_find_node_by_name(gic_node, "ppi-partitions");
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parts_node = of_get_child_by_name(gic_node, "ppi-partitions");
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if (!parts_node)
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return;
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nr_parts = of_get_child_count(parts_node);
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if (!nr_parts)
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return;
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goto out_put_node;
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parts = kzalloc(sizeof(*parts) * nr_parts, GFP_KERNEL);
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if (WARN_ON(!parts))
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return;
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goto out_put_node;
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for_each_child_of_node(parts_node, child_part) {
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struct partition_affinity *part;
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@ -1181,6 +1181,9 @@ static void __init gic_populate_ppi_partitions(struct device_node *gic_node)
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gic_data.ppi_descs[i] = desc;
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}
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out_put_node:
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of_node_put(parts_node);
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}
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static void __init gic_of_setup_kvm_info(struct device_node *node)
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@ -1521,7 +1524,7 @@ gic_acpi_init(struct acpi_subtable_header *header, const unsigned long end)
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err = gic_validate_dist_version(acpi_data.dist_base);
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if (err) {
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pr_err("No distributor detected at @%p, giving up",
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pr_err("No distributor detected at @%p, giving up\n",
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acpi_data.dist_base);
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goto out_dist_unmap;
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}
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@ -177,6 +177,7 @@ int its_map_vlpi(int irq, struct its_vlpi_map *map)
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.map = map,
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},
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};
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int ret;
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/*
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* The host will never see that interrupt firing again, so it
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@ -184,7 +185,11 @@ int its_map_vlpi(int irq, struct its_vlpi_map *map)
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*/
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irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY);
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return irq_set_vcpu_affinity(irq, &info);
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ret = irq_set_vcpu_affinity(irq, &info);
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if (ret)
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irq_clear_status_flags(irq, IRQ_DISABLE_UNLAZY);
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return ret;
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}
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int its_get_vlpi(int irq, struct its_vlpi_map *map)
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@ -156,7 +156,7 @@ static int s3c_irq_type(struct irq_data *data, unsigned int type)
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irq_set_handler(data->irq, handle_level_irq);
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break;
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default:
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pr_err("No such irq type %d", type);
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pr_err("No such irq type %d\n", type);
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return -EINVAL;
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}
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@ -204,7 +204,7 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg,
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break;
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default:
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pr_err("No such irq type %d", type);
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pr_err("No such irq type %d\n", type);
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return -EINVAL;
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}
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@ -211,6 +211,7 @@ struct irq_data {
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* IRQD_MANAGED_SHUTDOWN - Interrupt was shutdown due to empty affinity
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* mask. Applies only to affinity managed irqs.
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* IRQD_SINGLE_TARGET - IRQ allows only a single affinity target
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* IRQD_DEFAULT_TRIGGER_SET - Expected trigger already been set
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*/
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enum {
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IRQD_TRIGGER_MASK = 0xf,
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@ -231,6 +232,7 @@ enum {
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IRQD_IRQ_STARTED = (1 << 22),
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IRQD_MANAGED_SHUTDOWN = (1 << 23),
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IRQD_SINGLE_TARGET = (1 << 24),
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IRQD_DEFAULT_TRIGGER_SET = (1 << 25),
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};
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#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
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@ -260,18 +262,25 @@ static inline void irqd_mark_affinity_was_set(struct irq_data *d)
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__irqd_to_state(d) |= IRQD_AFFINITY_SET;
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}
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static inline bool irqd_trigger_type_was_set(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_DEFAULT_TRIGGER_SET;
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}
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static inline u32 irqd_get_trigger_type(struct irq_data *d)
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{
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return __irqd_to_state(d) & IRQD_TRIGGER_MASK;
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}
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/*
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* Must only be called inside irq_chip.irq_set_type() functions.
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* Must only be called inside irq_chip.irq_set_type() functions or
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* from the DT/ACPI setup code.
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*/
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static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
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{
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__irqd_to_state(d) &= ~IRQD_TRIGGER_MASK;
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__irqd_to_state(d) |= type & IRQD_TRIGGER_MASK;
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__irqd_to_state(d) |= IRQD_DEFAULT_TRIGGER_SET;
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}
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static inline bool irqd_is_level_type(struct irq_data *d)
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@ -109,6 +109,7 @@ int its_get_vlpi(int irq, struct its_vlpi_map *map);
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int its_unmap_vlpi(int irq);
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int its_prop_update_vlpi(int irq, u8 config, bool inv);
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struct irq_domain_ops;
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int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops);
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#endif
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@ -1246,7 +1246,18 @@ __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
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* set the trigger type must match. Also all must
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* agree on ONESHOT.
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*/
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unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
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unsigned int oldtype;
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/*
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* If nobody did set the configuration before, inherit
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* the one provided by the requester.
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*/
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if (irqd_trigger_type_was_set(&desc->irq_data)) {
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oldtype = irqd_get_trigger_type(&desc->irq_data);
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} else {
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oldtype = new->flags & IRQF_TRIGGER_MASK;
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irqd_set_trigger_type(&desc->irq_data, oldtype);
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}
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if (!((old->flags & new->flags) & IRQF_SHARED) ||
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(oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
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