forked from luck/tmp_suning_uos_patched
staging: iio: adc: ad7192: Add system calibration support
This patch will add a system calibration attribute for each channel. Using this option the user will have the ability to calibrate each channel for zero scale and full scale. It uses the iio_chan_spec_ext_info and IIO_ENUM to implement the functionality. Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -13,3 +13,27 @@ Description:
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need to minimize the system current consumption.
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Reading gives the state of the bridge switch.
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Writing '1' enables the bridge switch.
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What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Initiates the system calibration procedure. This is done on a
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single channel at a time. Write '1' to start the calibration.
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What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration_mode_available
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Reading returns a list with the possible calibration modes.
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There are two available options:
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"zero_scale" - calibrate to zero scale
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"full_scale" - calibrate to full scale
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What: /sys/bus/iio/devices/iio:deviceX/in_voltagex_sys_calibration_mode
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Sets up the calibration mode used in the system calibration
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procedure. Reading returns the current calibration mode.
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Writing sets the system calibration mode.
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@ -155,6 +155,11 @@
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* The DOUT/RDY output must also be wired to an interrupt capable GPIO.
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*/
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enum {
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AD7192_SYSCALIB_ZERO_SCALE,
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AD7192_SYSCALIB_FULL_SCALE,
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};
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struct ad7192_state {
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struct regulator *avdd;
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struct regulator *dvdd;
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@ -169,10 +174,80 @@ struct ad7192_state {
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u8 devid;
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u8 clock_sel;
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struct mutex lock; /* protect sensor state */
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u8 syscalib_mode[8];
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struct ad_sigma_delta sd;
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};
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static const char * const ad7192_syscalib_modes[] = {
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[AD7192_SYSCALIB_ZERO_SCALE] = "zero_scale",
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[AD7192_SYSCALIB_FULL_SCALE] = "full_scale",
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};
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static int ad7192_set_syscalib_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int mode)
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{
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struct ad7192_state *st = iio_priv(indio_dev);
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st->syscalib_mode[chan->channel] = mode;
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return 0;
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}
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static int ad7192_get_syscalib_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct ad7192_state *st = iio_priv(indio_dev);
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return st->syscalib_mode[chan->channel];
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}
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static ssize_t ad7192_write_syscalib(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct ad7192_state *st = iio_priv(indio_dev);
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bool sys_calib;
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int ret, temp;
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ret = strtobool(buf, &sys_calib);
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if (ret)
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return ret;
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temp = st->syscalib_mode[chan->channel];
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if (sys_calib) {
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if (temp == AD7192_SYSCALIB_ZERO_SCALE)
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ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_ZERO,
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chan->address);
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else
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ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_FULL,
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chan->address);
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}
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return ret ? ret : len;
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}
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static const struct iio_enum ad7192_syscalib_mode_enum = {
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.items = ad7192_syscalib_modes,
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.num_items = ARRAY_SIZE(ad7192_syscalib_modes),
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.set = ad7192_set_syscalib_mode,
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.get = ad7192_get_syscalib_mode
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};
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static const struct iio_chan_spec_ext_info ad7192_calibsys_ext_info[] = {
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{
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.name = "sys_calibration",
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.write = ad7192_write_syscalib,
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.shared = IIO_SEPARATE,
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},
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IIO_ENUM("sys_calibration_mode", IIO_SEPARATE,
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&ad7192_syscalib_mode_enum),
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IIO_ENUM_AVAILABLE("sys_calibration_mode", &ad7192_syscalib_mode_enum),
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{}
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};
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static struct ad7192_state *ad_sigma_delta_to_ad7192(struct ad_sigma_delta *sd)
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{
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return container_of(sd, struct ad7192_state, sd);
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@ -770,9 +845,11 @@ static int ad7192_channels_config(struct iio_dev *indio_dev)
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*chan = channels[i];
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chan->info_mask_shared_by_all |=
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BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY);
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if (chan->type != IIO_TEMP)
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if (chan->type != IIO_TEMP) {
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chan->info_mask_shared_by_type_available |=
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BIT(IIO_CHAN_INFO_SCALE);
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chan->ext_info = ad7192_calibsys_ext_info;
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}
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chan++;
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}
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