forked from luck/tmp_suning_uos_patched
MIPS: Lantiq: Adds minimal dcdc driver
This driver so far only reads the core voltage. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o
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obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
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obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
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arch/mips/lantiq/xway/dcdc.c
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arch/mips/lantiq/xway/dcdc.c
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/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2012 John Crispin <blogic@openwrt.org>
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* Copyright (C) 2010 Sameer Ahmad, Lantiq GmbH
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*/
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#include <linux/ioport.h>
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#include <linux/of_platform.h>
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#include <lantiq_soc.h>
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/* Bias and regulator Setup Register */
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#define DCDC_BIAS_VREG0 0xa
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/* Bias and regulator Setup Register */
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#define DCDC_BIAS_VREG1 0xb
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#define dcdc_w8(x, y) ltq_w8((x), dcdc_membase + (y))
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#define dcdc_r8(x) ltq_r8(dcdc_membase + (x))
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static void __iomem *dcdc_membase;
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static int dcdc_probe(struct platform_device *pdev)
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{
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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dcdc_membase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(dcdc_membase))
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return PTR_ERR(dcdc_membase);
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dev_info(&pdev->dev, "Core Voltage : %d mV\n",
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dcdc_r8(DCDC_BIAS_VREG1) * 8);
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return 0;
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}
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static const struct of_device_id dcdc_match[] = {
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{ .compatible = "lantiq,dcdc-xrx200" },
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{},
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};
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static struct platform_driver dcdc_driver = {
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.probe = dcdc_probe,
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.driver = {
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.name = "dcdc-xrx200",
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.owner = THIS_MODULE,
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.of_match_table = dcdc_match,
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},
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};
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int __init dcdc_init(void)
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{
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int ret = platform_driver_register(&dcdc_driver);
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if (ret)
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pr_info("dcdc: Error registering platform driver\n");
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return ret;
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}
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arch_initcall(dcdc_init);
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