forked from luck/tmp_suning_uos_patched
sh: x3 - add ipi vectors
With the intc dual prio register support in place it is now possible to add the ipi vectors to x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -89,6 +89,8 @@ enum {
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FE0, FE1,
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GPIO0, GPIO1, GPIO2, GPIO3,
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PAM, IRM,
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INTICI0, INTICI1, INTICI2, INTICI3,
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INTICI4, INTICI5, INTICI6, INTICI7,
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/* interrupt groups */
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IRL, PCII56789, SCIF0, SCIF1, SCIF2, SCIF3,
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@ -137,6 +139,10 @@ static struct intc_vect vectors[] = {
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INTC_VECT(GPIO0, 0xe40), INTC_VECT(GPIO1, 0xe60),
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INTC_VECT(GPIO2, 0xe80), INTC_VECT(GPIO3, 0xea0),
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INTC_VECT(PAM, 0xec0), INTC_VECT(IRM, 0xee0),
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INTC_VECT(INTICI0, 0xf00), INTC_VECT(INTICI1, 0xf20),
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INTC_VECT(INTICI2, 0xf40), INTC_VECT(INTICI3, 0xf60),
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INTC_VECT(INTICI4, 0xf80), INTC_VECT(INTICI5, 0xfa0),
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INTC_VECT(INTICI6, 0xfc0), INTC_VECT(INTICI7, 0xfe0),
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};
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static struct intc_group groups[] = {
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@ -207,6 +213,9 @@ static struct intc_prio_reg prio_registers[] = {
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VIN1, VIN0, IIC, DU} },
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{ 0xfe410810, 0, 32, 4, /* INT2PRI4 */ { 0, 0, PAM, GPIO3,
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GPIO2, GPIO1, GPIO0, IRM } },
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{ 0xfe410090, 0xfe4100a0, 32, 4, /* CnICIPRI / CnICIPRICLR */
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{ INTICI7, INTICI6, INTICI5, INTICI4,
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INTICI3, INTICI2, INTICI1, INTICI0 } },
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};
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static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities,
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