forked from luck/tmp_suning_uos_patched
x86: uv: Clean up the direct access to irq_desc
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
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1a8ce7ff68
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48b2650196
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@ -101,7 +101,6 @@ struct irq_cfg {
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#endif
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};
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extern struct irq_cfg *irq_cfg(unsigned int);
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extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
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extern void send_cleanup_vector(struct irq_cfg *);
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@ -178,7 +178,7 @@ int __init arch_early_irq_init(void)
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}
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#ifdef CONFIG_SPARSE_IRQ
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struct irq_cfg *irq_cfg(unsigned int irq)
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static struct irq_cfg *irq_cfg(unsigned int irq)
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{
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return get_irq_chip_data(irq);
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}
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@ -28,34 +28,21 @@ struct uv_irq_2_mmr_pnode{
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static spinlock_t uv_irq_lock;
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static struct rb_root uv_irq_root;
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static int uv_set_irq_affinity(unsigned int, const struct cpumask *);
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static int uv_set_irq_affinity(struct irq_data *, const struct cpumask *, bool);
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static void uv_noop(unsigned int irq)
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{
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}
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static void uv_noop(struct irq_data *data) { }
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static unsigned int uv_noop_ret(unsigned int irq)
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{
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return 0;
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}
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static void uv_ack_apic(unsigned int irq)
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static void uv_ack_apic(struct irq_data *data)
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{
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ack_APIC_irq();
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}
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static struct irq_chip uv_irq_chip = {
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.name = "UV-CORE",
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.startup = uv_noop_ret,
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.shutdown = uv_noop,
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.enable = uv_noop,
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.disable = uv_noop,
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.ack = uv_noop,
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.mask = uv_noop,
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.unmask = uv_noop,
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.eoi = uv_ack_apic,
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.end = uv_noop,
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.set_affinity = uv_set_irq_affinity,
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.name = "UV-CORE",
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.irq_mask = uv_noop,
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.irq_unmask = uv_noop,
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.irq_eoi = uv_ack_apic,
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.irq_set_affinity = uv_set_irq_affinity,
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};
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/*
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@ -144,26 +131,22 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
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unsigned long mmr_offset, int limit)
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{
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const struct cpumask *eligible_cpu = cpumask_of(cpu);
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struct irq_desc *desc = irq_to_desc(irq);
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struct irq_cfg *cfg;
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int mmr_pnode;
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struct irq_cfg *cfg = get_irq_chip_data(irq);
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unsigned long mmr_value;
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struct uv_IO_APIC_route_entry *entry;
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int err;
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int mmr_pnode, err;
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BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=
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sizeof(unsigned long));
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cfg = irq_cfg(irq);
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err = assign_irq_vector(irq, cfg, eligible_cpu);
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if (err != 0)
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return err;
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if (limit == UV_AFFINITY_CPU)
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desc->status |= IRQ_NO_BALANCING;
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irq_set_status_flags(irq, IRQ_NO_BALANCING);
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else
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desc->status |= IRQ_MOVE_PCNTXT;
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irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
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set_irq_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq,
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irq_name);
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@ -206,17 +189,17 @@ static void arch_disable_uv_irq(int mmr_pnode, unsigned long mmr_offset)
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uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
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}
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static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
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static int
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uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask,
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bool force)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
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struct irq_cfg *cfg = data->chip_data;
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unsigned int dest;
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unsigned long mmr_value;
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unsigned long mmr_value, mmr_offset;
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struct uv_IO_APIC_route_entry *entry;
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unsigned long mmr_offset;
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int mmr_pnode;
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if (__ioapic_set_affinity(&desc->irq_data, mask, &dest))
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if (__ioapic_set_affinity(data, mask, &dest))
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return -1;
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mmr_value = 0;
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@ -231,7 +214,7 @@ static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask)
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entry->dest = dest;
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/* Get previously stored MMR and pnode of hub sourcing interrupts */
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if (uv_irq_2_mmr_info(irq, &mmr_offset, &mmr_pnode))
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if (uv_irq_2_mmr_info(data->irq, &mmr_offset, &mmr_pnode))
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return -1;
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uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
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