forked from luck/tmp_suning_uos_patched
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
Pull idle update from Len Brown: "Two Intel-platform-specific updates to intel_idle, and a cosmetic tweak to the turbostat utility" * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: tools/power turbostat: tweak whitespace in output format intel_idle: Broadwell support intel_idle: Disable Baytrail Core and Module C6 auto-demotion
This commit is contained in:
commit
49899007b9
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@ -149,6 +149,9 @@
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#define MSR_CORE_C1_RES 0x00000660
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#define MSR_CC6_DEMOTION_POLICY_CONFIG 0x00000668
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#define MSR_MC6_DEMOTION_POLICY_CONFIG 0x00000669
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#define MSR_AMD64_MC0_MASK 0xc0010044
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#define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))
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@ -89,6 +89,7 @@ struct idle_cpu {
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* Indicate which enable bits to clear here.
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*/
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unsigned long auto_demotion_disable_flags;
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bool byt_auto_demotion_disable_flag;
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bool disable_promotion_to_c1e;
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};
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@ -442,6 +443,66 @@ static struct cpuidle_state hsw_cstates[] = {
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{
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.enter = NULL }
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};
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static struct cpuidle_state bdw_cstates[] = {
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{
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.name = "C1-BDW",
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.desc = "MWAIT 0x00",
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.flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 2,
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.target_residency = 2,
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.enter = &intel_idle },
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{
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.name = "C1E-BDW",
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.desc = "MWAIT 0x01",
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.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
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.exit_latency = 10,
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.target_residency = 20,
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.enter = &intel_idle },
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{
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.name = "C3-BDW",
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.desc = "MWAIT 0x10",
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.flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 40,
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.target_residency = 100,
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.enter = &intel_idle },
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{
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.name = "C6-BDW",
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.desc = "MWAIT 0x20",
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.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 133,
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.target_residency = 400,
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.enter = &intel_idle },
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{
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.name = "C7s-BDW",
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.desc = "MWAIT 0x32",
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.flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 166,
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.target_residency = 500,
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.enter = &intel_idle },
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{
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.name = "C8-BDW",
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.desc = "MWAIT 0x40",
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 300,
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.target_residency = 900,
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.enter = &intel_idle },
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{
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.name = "C9-BDW",
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.desc = "MWAIT 0x50",
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 600,
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.target_residency = 1800,
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.enter = &intel_idle },
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{
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.name = "C10-BDW",
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.desc = "MWAIT 0x60",
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 2600,
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.target_residency = 7700,
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.enter = &intel_idle },
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{
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.enter = NULL }
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};
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static struct cpuidle_state atom_cstates[] = {
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{
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@ -613,6 +674,7 @@ static const struct idle_cpu idle_cpu_snb = {
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static const struct idle_cpu idle_cpu_byt = {
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.state_table = byt_cstates,
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.disable_promotion_to_c1e = true,
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.byt_auto_demotion_disable_flag = true,
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};
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static const struct idle_cpu idle_cpu_ivb = {
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@ -630,6 +692,11 @@ static const struct idle_cpu idle_cpu_hsw = {
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.disable_promotion_to_c1e = true,
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};
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static const struct idle_cpu idle_cpu_bdw = {
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.state_table = bdw_cstates,
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.disable_promotion_to_c1e = true,
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};
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static const struct idle_cpu idle_cpu_avn = {
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.state_table = avn_cstates,
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.disable_promotion_to_c1e = true,
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@ -658,7 +725,10 @@ static const struct x86_cpu_id intel_idle_ids[] = {
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ICPU(0x3f, idle_cpu_hsw),
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ICPU(0x45, idle_cpu_hsw),
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ICPU(0x46, idle_cpu_hsw),
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ICPU(0x4D, idle_cpu_avn),
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ICPU(0x4d, idle_cpu_avn),
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ICPU(0x3d, idle_cpu_bdw),
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ICPU(0x4f, idle_cpu_bdw),
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ICPU(0x56, idle_cpu_bdw),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
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@ -814,6 +884,11 @@ static int __init intel_idle_cpuidle_driver_init(void)
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if (icpu->auto_demotion_disable_flags)
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on_each_cpu(auto_demotion_disable, NULL, 1);
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if (icpu->byt_auto_demotion_disable_flag) {
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wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
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wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
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}
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if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
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on_each_cpu(c1e_promotion_disable, NULL, 1);
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@ -267,90 +267,90 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr)
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/*
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* Example Format w/ field column widths:
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*
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* Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
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* 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567 1234567
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* Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
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* 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
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*/
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void print_header(void)
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{
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if (show_pkg)
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outp += sprintf(outp, "Package ");
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outp += sprintf(outp, " Package");
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if (show_core)
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outp += sprintf(outp, " Core ");
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outp += sprintf(outp, " Core");
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if (show_cpu)
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outp += sprintf(outp, " CPU ");
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outp += sprintf(outp, " CPU");
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if (has_aperf)
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outp += sprintf(outp, "Avg_MHz ");
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outp += sprintf(outp, " Avg_MHz");
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if (do_nhm_cstates)
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outp += sprintf(outp, " %%Busy ");
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outp += sprintf(outp, " %%Busy");
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if (has_aperf)
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outp += sprintf(outp, "Bzy_MHz ");
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outp += sprintf(outp, "TSC_MHz ");
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outp += sprintf(outp, " Bzy_MHz");
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outp += sprintf(outp, " TSC_MHz");
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if (do_smi)
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outp += sprintf(outp, " SMI ");
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outp += sprintf(outp, " SMI");
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if (extra_delta_offset32)
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outp += sprintf(outp, " count 0x%03X ", extra_delta_offset32);
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outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
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if (extra_delta_offset64)
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outp += sprintf(outp, " COUNT 0x%03X ", extra_delta_offset64);
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outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
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if (extra_msr_offset32)
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outp += sprintf(outp, " MSR 0x%03X ", extra_msr_offset32);
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outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
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if (extra_msr_offset64)
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outp += sprintf(outp, " MSR 0x%03X ", extra_msr_offset64);
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outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
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if (do_nhm_cstates)
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outp += sprintf(outp, " CPU%%c1 ");
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outp += sprintf(outp, " CPU%%c1");
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if (do_nhm_cstates && !do_slm_cstates)
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outp += sprintf(outp, " CPU%%c3 ");
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outp += sprintf(outp, " CPU%%c3");
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if (do_nhm_cstates)
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outp += sprintf(outp, " CPU%%c6 ");
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outp += sprintf(outp, " CPU%%c6");
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if (do_snb_cstates)
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outp += sprintf(outp, " CPU%%c7 ");
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outp += sprintf(outp, " CPU%%c7");
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if (do_dts)
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outp += sprintf(outp, "CoreTmp ");
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outp += sprintf(outp, " CoreTmp");
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if (do_ptm)
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outp += sprintf(outp, " PkgTmp ");
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outp += sprintf(outp, " PkgTmp");
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if (do_snb_cstates)
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outp += sprintf(outp, "Pkg%%pc2 ");
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outp += sprintf(outp, " Pkg%%pc2");
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if (do_nhm_cstates && !do_slm_cstates)
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outp += sprintf(outp, "Pkg%%pc3 ");
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outp += sprintf(outp, " Pkg%%pc3");
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if (do_nhm_cstates && !do_slm_cstates)
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outp += sprintf(outp, "Pkg%%pc6 ");
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outp += sprintf(outp, " Pkg%%pc6");
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if (do_snb_cstates)
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outp += sprintf(outp, "Pkg%%pc7 ");
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outp += sprintf(outp, " Pkg%%pc7");
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if (do_c8_c9_c10) {
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outp += sprintf(outp, "Pkg%%pc8 ");
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outp += sprintf(outp, "Pkg%%pc9 ");
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outp += sprintf(outp, "Pk%%pc10 ");
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outp += sprintf(outp, " Pkg%%pc8");
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outp += sprintf(outp, " Pkg%%pc9");
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outp += sprintf(outp, " Pk%%pc10");
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}
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if (do_rapl && !rapl_joules) {
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if (do_rapl & RAPL_PKG)
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outp += sprintf(outp, "PkgWatt ");
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outp += sprintf(outp, " PkgWatt");
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if (do_rapl & RAPL_CORES)
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outp += sprintf(outp, "CorWatt ");
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outp += sprintf(outp, " CorWatt");
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if (do_rapl & RAPL_GFX)
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outp += sprintf(outp, "GFXWatt ");
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outp += sprintf(outp, " GFXWatt");
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if (do_rapl & RAPL_DRAM)
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outp += sprintf(outp, "RAMWatt ");
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outp += sprintf(outp, " RAMWatt");
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if (do_rapl & RAPL_PKG_PERF_STATUS)
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outp += sprintf(outp, " PKG_%% ");
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outp += sprintf(outp, " PKG_%%");
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if (do_rapl & RAPL_DRAM_PERF_STATUS)
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outp += sprintf(outp, " RAM_%% ");
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outp += sprintf(outp, " RAM_%%");
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} else {
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if (do_rapl & RAPL_PKG)
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outp += sprintf(outp, " Pkg_J ");
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outp += sprintf(outp, " Pkg_J");
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if (do_rapl & RAPL_CORES)
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outp += sprintf(outp, " Cor_J ");
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outp += sprintf(outp, " Cor_J");
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if (do_rapl & RAPL_GFX)
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outp += sprintf(outp, " GFX_J ");
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outp += sprintf(outp, " GFX_J");
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if (do_rapl & RAPL_DRAM)
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outp += sprintf(outp, " RAM_W ");
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outp += sprintf(outp, " RAM_W");
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if (do_rapl & RAPL_PKG_PERF_STATUS)
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outp += sprintf(outp, " PKG_%% ");
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outp += sprintf(outp, " PKG_%%");
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if (do_rapl & RAPL_DRAM_PERF_STATUS)
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outp += sprintf(outp, " RAM_%% ");
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outp += sprintf(outp, " time ");
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outp += sprintf(outp, " RAM_%%");
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outp += sprintf(outp, " time");
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}
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outp += sprintf(outp, "\n");
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