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perf/urgent fixes:

Browse Source 
. Revert "perf pmu: Fix pmu events parsing rule", as it broke Intel PT
   event description parsing (Arnaldo Carvalho de Melo)
 
 . Sync x86's cpufeatures.h and kvm UAPI headers with the kernel sources,
   suppressing the ABI drift warnings (Arnaldo Carvalho de Melo)
 
 - Remove duplicated entry for westmereep-dp in Intel's mapfile.csv (William Cohen)
 
 - Fix typo in 'perf bench numa' options description (Yisheng Xie)
 
 Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Merge tag 'perf-urgent-for-mingo-4.17-20180507' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/urgent

Pull perf/urgent fixes from Arnaldo Carvalho de Melo:

. Revert "perf pmu: Fix pmu events parsing rule", as it broke Intel PT
  event description parsing (Arnaldo Carvalho de Melo)

. Sync x86's cpufeatures.h and kvm UAPI headers with the kernel sources,
  suppressing the ABI drift warnings (Arnaldo Carvalho de Melo)

- Remove duplicated entry for westmereep-dp in Intel's mapfile.csv (William Cohen)

- Fix typo in 'perf bench numa' options description (Yisheng Xie)

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar 2018-05-10 20:09:00 +02:00
commit 49cf4a4b3f
7 changed files with 25 additions and 6 deletions
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6
tools/arch/arm/include/uapi/asm/kvm.h
View File

@ -195,6 +195,12 @@ struct kvm_arch_memory_slot {
#define KVM_REG_ARM_VFP_FPINST 0x1009
#define KVM_REG_ARM_VFP_FPINST2 0x100A
/* KVM-as-firmware specific pseudo-registers */
#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_FW | ((r) & 0xffff))
#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
/* Device Control API: ARM VGIC */
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1

6
tools/arch/arm64/include/uapi/asm/kvm.h
View File

@ -206,6 +206,12 @@ struct kvm_arch_memory_slot {
#define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2)
#define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2)
/* KVM-as-firmware specific pseudo-registers */
#define KVM_REG_ARM_FW (0x0014 << KVM_REG_ARM_COPROC_SHIFT)
#define KVM_REG_ARM_FW_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_FW | ((r) & 0xffff))
#define KVM_REG_ARM_PSCI_VERSION KVM_REG_ARM_FW_REG(0)
/* Device Control API: ARM VGIC */
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1

1
tools/arch/x86/include/asm/cpufeatures.h
View File

@ -320,6 +320,7 @@
#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
#define X86_FEATURE_CLDEMOTE (16*32+25) /* CLDEMOTE instruction */
/* AMD-defined CPU features, CPUID level 0x80000007 (EBX), word 17 */
#define X86_FEATURE_OVERFLOW_RECOV (17*32+ 0) /* MCA overflow recovery support */

7
tools/include/uapi/linux/kvm.h
View File

@ -676,6 +676,13 @@ struct kvm_ioeventfd {
__u8 pad[36];
};
#define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0)
#define KVM_X86_DISABLE_EXITS_HTL (1 << 1)
#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \
KVM_X86_DISABLE_EXITS_HTL | \
KVM_X86_DISABLE_EXITS_PAUSE)
/* for KVM_ENABLE_CAP */
struct kvm_enable_cap {
/* in */

2
tools/perf/bench/numa.c
View File

@ -175,7 +175,7 @@ static const struct option options[] = {
OPT_UINTEGER('s', "nr_secs" , &p0.nr_secs, "max number of seconds to run (default: 5 secs)"),
OPT_UINTEGER('u', "usleep" , &p0.sleep_usecs, "usecs to sleep per loop iteration"),
OPT_BOOLEAN('R', "data_reads" , &p0.data_reads, "access the data via writes (can be mixed with -W)"),
OPT_BOOLEAN('R', "data_reads" , &p0.data_reads, "access the data via reads (can be mixed with -W)"),
OPT_BOOLEAN('W', "data_writes" , &p0.data_writes, "access the data via writes (can be mixed with -R)"),
OPT_BOOLEAN('B', "data_backwards", &p0.data_backwards, "access the data backwards as well"),
OPT_BOOLEAN('Z', "data_zero_memset", &p0.data_zero_memset,"access the data via glibc bzero only"),

1
tools/perf/pmu-events/arch/x86/mapfile.csv
View File

@ -29,7 +29,6 @@ GenuineIntel-6-4D,v13,silvermont,core
GenuineIntel-6-4C,v13,silvermont,core
GenuineIntel-6-2A,v15,sandybridge,core
GenuineIntel-6-2C,v2,westmereep-dp,core
GenuineIntel-6-2C,v2,westmereep-dp,core
GenuineIntel-6-25,v2,westmereep-sp,core
GenuineIntel-6-2F,v2,westmereex,core
GenuineIntel-6-55,v1,skylakex,core

1 Family-model Version Filename EventType
29 GenuineIntel-6-4C v13 silvermont core
30 GenuineIntel-6-2A v15 sandybridge core
31 GenuineIntel-6-2C v2 westmereep-dp core
GenuineIntel-6-2C v2 westmereep-dp core
32 GenuineIntel-6-25 v2 westmereep-sp core
33 GenuineIntel-6-2F v2 westmereex core
34 GenuineIntel-6-55 v1 skylakex core

8
tools/perf/util/parse-events.y
View File

@ -224,15 +224,15 @@ event_def: event_pmu |
event_bpf_file
event_pmu:
PE_NAME '/' event_config '/'
PE_NAME opt_event_config
{
struct list_head *list, *orig_terms, *terms;
if (parse_events_copy_term_list($3, &orig_terms))
if (parse_events_copy_term_list($2, &orig_terms))
YYABORT;
ALLOC_LIST(list);
if (parse_events_add_pmu(_parse_state, list, $1, $3, false)) {
if (parse_events_add_pmu(_parse_state, list, $1, $2, false)) {
struct perf_pmu *pmu = NULL;
int ok = 0;
char *pattern;
@ -262,7 +262,7 @@ PE_NAME '/' event_config '/'
if (!ok)
YYABORT;
}
parse_events_terms__delete($3);
parse_events_terms__delete($2);
parse_events_terms__delete(orig_terms);
$$ = list;
}