m68knommu: support ColdFire caches that do copyback and write-through

The version 3 and version 4 ColdFire cache controllers support both
write-through and copy-back modes on the data cache. Allow for Kconfig
time configuration of this, and set the cache mode appropriately.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2010-11-09 16:00:17 +10:00
parent 0ef6c9b8f7
commit 4a5bae4165
3 changed files with 35 additions and 1 deletions

View File

@ -53,6 +53,12 @@
* CACR is cache inhibited, we use the ACR register to set cacheing * CACR is cache inhibited, we use the ACR register to set cacheing
* enabled on the regions we want (eg RAM). * enabled on the regions we want (eg RAM).
*/ */
#if defined(CONFIG_CACHE_COPYBACK)
#define CACHE_TYPE ACR_CM_CB
#else
#define CACHE_TYPE ACR_CM_WT
#endif
#ifdef CONFIG_COLDFIRE_SW_A7 #ifdef CONFIG_COLDFIRE_SW_A7
#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE) #define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE)
#else #else
@ -63,7 +69,7 @@
#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \ #define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
(0x000f0000) + \ (0x000f0000) + \
(ACR_ENABLE + ACR_ANY + ACR_CM_CB)) (ACR_ENABLE + ACR_ANY + CACHE_TYPE))
#define ACR1_MODE 0 #define ACR1_MODE 0
/****************************************************************************/ /****************************************************************************/

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@ -73,7 +73,11 @@
#else #else
#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP) #define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
#endif #endif
#if defined(CONFIG_CACHE_COPYBACK)
#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
#else
#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT) #define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
#endif
#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY) #define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) #define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)

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@ -82,6 +82,9 @@ config COLDFIRE_SW_A7
config HAVE_CACHE_SPLIT config HAVE_CACHE_SPLIT
bool bool
config HAVE_CACHE_CB
bool
source "init/Kconfig" source "init/Kconfig"
source "kernel/Kconfig.freezer" source "kernel/Kconfig.freezer"
@ -172,27 +175,32 @@ config M528x
config M5307 config M5307
bool "MCF5307" bool "MCF5307"
select COLDFIRE_SW_A7 select COLDFIRE_SW_A7
select HAVE_CACHE_CB
help help
Motorola ColdFire 5307 processor support. Motorola ColdFire 5307 processor support.
config M532x config M532x
bool "MCF532x" bool "MCF532x"
select HAVE_CACHE_CB
help help
Freescale (Motorola) ColdFire 532x processor support. Freescale (Motorola) ColdFire 532x processor support.
config M5407 config M5407
bool "MCF5407" bool "MCF5407"
select COLDFIRE_SW_A7 select COLDFIRE_SW_A7
select HAVE_CACHE_CB
help help
Motorola ColdFire 5407 processor support. Motorola ColdFire 5407 processor support.
config M547x config M547x
bool "MCF547x" bool "MCF547x"
select HAVE_CACHE_CB
help help
Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
config M548x config M548x
bool "MCF548x" bool "MCF548x"
select HAVE_CACHE_CB
help help
Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
@ -279,7 +287,23 @@ config CACHE_BOTH
Split the ColdFire CPU cache, and use half as an instruction cache Split the ColdFire CPU cache, and use half as an instruction cache
and half as a data cache. and half as a data cache.
endchoice endchoice
endif
if HAVE_CACHE_CB
choice
prompt "Data cache mode"
default CACHE_WRITETHRU
config CACHE_WRITETHRU
bool "Write-through"
help
The ColdFire CPU cache is set into Write-through mode.
config CACHE_COPYBACK
bool "Copy-back"
help
The ColdFire CPU cache is set into Copy-back mode.
endchoice
endif endif
comment "Platform" comment "Platform"