forked from luck/tmp_suning_uos_patched
m68knommu: support ColdFire caches that do copyback and write-through
The version 3 and version 4 ColdFire cache controllers support both write-through and copy-back modes on the data cache. Allow for Kconfig time configuration of this, and set the cache mode appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -53,6 +53,12 @@
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* CACR is cache inhibited, we use the ACR register to set cacheing
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* CACR is cache inhibited, we use the ACR register to set cacheing
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* enabled on the regions we want (eg RAM).
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* enabled on the regions we want (eg RAM).
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*/
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*/
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#if defined(CONFIG_CACHE_COPYBACK)
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#define CACHE_TYPE ACR_CM_CB
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#else
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#define CACHE_TYPE ACR_CM_WT
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#endif
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#ifdef CONFIG_COLDFIRE_SW_A7
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#ifdef CONFIG_COLDFIRE_SW_A7
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#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE)
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#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE)
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#else
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#else
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@ -63,7 +69,7 @@
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#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
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#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
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(0x000f0000) + \
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(0x000f0000) + \
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(ACR_ENABLE + ACR_ANY + ACR_CM_CB))
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(ACR_ENABLE + ACR_ANY + CACHE_TYPE))
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#define ACR1_MODE 0
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#define ACR1_MODE 0
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/****************************************************************************/
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/****************************************************************************/
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@ -73,7 +73,11 @@
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#else
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#else
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#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
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#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP)
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#endif
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#endif
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#if defined(CONFIG_CACHE_COPYBACK)
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#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP)
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#else
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#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
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#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT)
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#endif
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#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
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#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY)
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#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
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#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA)
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@ -82,6 +82,9 @@ config COLDFIRE_SW_A7
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config HAVE_CACHE_SPLIT
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config HAVE_CACHE_SPLIT
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bool
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bool
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config HAVE_CACHE_CB
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bool
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source "init/Kconfig"
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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source "kernel/Kconfig.freezer"
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@ -172,27 +175,32 @@ config M528x
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config M5307
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config M5307
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bool "MCF5307"
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bool "MCF5307"
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select COLDFIRE_SW_A7
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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help
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help
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Motorola ColdFire 5307 processor support.
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Motorola ColdFire 5307 processor support.
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config M532x
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config M532x
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bool "MCF532x"
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bool "MCF532x"
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select HAVE_CACHE_CB
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help
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help
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Freescale (Motorola) ColdFire 532x processor support.
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Freescale (Motorola) ColdFire 532x processor support.
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config M5407
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config M5407
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bool "MCF5407"
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bool "MCF5407"
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select COLDFIRE_SW_A7
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select COLDFIRE_SW_A7
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select HAVE_CACHE_CB
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help
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help
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Motorola ColdFire 5407 processor support.
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Motorola ColdFire 5407 processor support.
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config M547x
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config M547x
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bool "MCF547x"
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bool "MCF547x"
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select HAVE_CACHE_CB
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help
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help
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Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
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Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
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config M548x
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config M548x
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bool "MCF548x"
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bool "MCF548x"
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select HAVE_CACHE_CB
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help
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help
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Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
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Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
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@ -279,7 +287,23 @@ config CACHE_BOTH
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Split the ColdFire CPU cache, and use half as an instruction cache
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Split the ColdFire CPU cache, and use half as an instruction cache
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and half as a data cache.
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and half as a data cache.
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endchoice
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endchoice
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endif
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if HAVE_CACHE_CB
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choice
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prompt "Data cache mode"
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default CACHE_WRITETHRU
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config CACHE_WRITETHRU
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bool "Write-through"
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help
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The ColdFire CPU cache is set into Write-through mode.
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config CACHE_COPYBACK
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bool "Copy-back"
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help
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The ColdFire CPU cache is set into Copy-back mode.
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endchoice
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endif
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endif
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comment "Platform"
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comment "Platform"
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