AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

[SPARC64]: Privatize sun4u_get_pte() and fix name.

Browse Source 
__get_phys is only called from init.c as is prom_virt_to_phys(),
__get_iospace() is not called at all, and sun4u_get_pte() is largely
misnamed.

Privatize the implementation and helper functions of
sun4u_get_phys() to mm/init.c, and rename to
kvaddr_to_paddr().

The only used of this thing is flush_icache_range(), and thus
things can be considerably further simplified.  For example,
we should only see module or PAGE_OFFSET kernel addresses here,
so we don't need the OBP firmware range handling at all.

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2007-03-15 15:44:05 -07:00
parent a0963bdfb9
commit 4be5c34dc4
2 changed files with 62 additions and 81 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

129
arch/sparc64/mm/init.c
View File

@ -392,6 +392,67 @@ void flush_dcache_page(struct page *page)
put_cpu();
}
struct linux_prom_translation {
unsigned long virt;
unsigned long size;
unsigned long data;
};
/* Exported for kernel TLB miss handling in ktlb.S */
struct linux_prom_translation prom_trans[512] __read_mostly;
unsigned int prom_trans_ents __read_mostly;
/*
* Translate PROM's mapping we capture at boot time into physical address.
* The second parameter is only set from prom_callback() invocations.
*/
static unsigned long prom_virt_to_phys(unsigned long promva)
{
unsigned long mask;
int i;
mask = _PAGE_PADDR_4U;
if (tlb_type == hypervisor)
mask = _PAGE_PADDR_4V;
for (i = 0; i < prom_trans_ents; i++) {
struct linux_prom_translation *p = &prom_trans[i];
if (promva >= p->virt &&
promva < (p->virt + p->size)) {
unsigned long base = p->data & mask;
return base + (promva & (8192 - 1));
}
}
return 0UL;
}
static unsigned long kvaddr_to_phys(unsigned long addr)
{
pgd_t *pgdp;
pud_t *pudp;
pmd_t *pmdp;
pte_t *ptep;
unsigned long mask = _PAGE_PADDR_4U;
if (tlb_type == hypervisor)
mask = _PAGE_PADDR_4V;
if (addr >= PAGE_OFFSET)
return addr & mask;
if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
return prom_virt_to_phys(addr);
pgdp = pgd_offset_k(addr);
pudp = pud_offset(pgdp, addr);
pmdp = pmd_offset(pudp, addr);
ptep = pte_offset_kernel(pmdp, addr);
return pte_val(*ptep) & mask;
}
void __kprobes flush_icache_range(unsigned long start, unsigned long end)
{
/* Cheetah and Hypervisor platform cpus have coherent I-cache. */
@ -399,7 +460,7 @@ void __kprobes flush_icache_range(unsigned long start, unsigned long end)
unsigned long kaddr;
for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE)
__flush_icache_page(__get_phys(kaddr));
__flush_icache_page(kvaddr_to_phys(kaddr));
}
}
@ -436,16 +497,6 @@ void mmu_info(struct seq_file *m)
#endif /* CONFIG_DEBUG_DCFLUSH */
}
struct linux_prom_translation {
unsigned long virt;
unsigned long size;
unsigned long data;
};
/* Exported for kernel TLB miss handling in ktlb.S */
struct linux_prom_translation prom_trans[512] __read_mostly;
unsigned int prom_trans_ents __read_mostly;
/* Exported for SMP bootup purposes. */
unsigned long kern_locked_tte_data;
@ -1875,62 +1926,6 @@ static unsigned long kern_large_tte(unsigned long paddr)
return val | paddr;
}
/*
* Translate PROM's mapping we capture at boot time into physical address.
* The second parameter is only set from prom_callback() invocations.
*/
unsigned long prom_virt_to_phys(unsigned long promva, int *error)
{
unsigned long mask;
int i;
mask = _PAGE_PADDR_4U;
if (tlb_type == hypervisor)
mask = _PAGE_PADDR_4V;
for (i = 0; i < prom_trans_ents; i++) {
struct linux_prom_translation *p = &prom_trans[i];
if (promva >= p->virt &&
promva < (p->virt + p->size)) {
unsigned long base = p->data & mask;
if (error)
*error = 0;
return base + (promva & (8192 - 1));
}
}
if (error)
*error = 1;
return 0UL;
}
/* XXX We should kill off this ugly thing at so me point. XXX */
unsigned long sun4u_get_pte(unsigned long addr)
{
pgd_t *pgdp;
pud_t *pudp;
pmd_t *pmdp;
pte_t *ptep;
unsigned long mask = _PAGE_PADDR_4U;
if (tlb_type == hypervisor)
mask = _PAGE_PADDR_4V;
if (addr >= PAGE_OFFSET)
return addr & mask;
if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
return prom_virt_to_phys(addr, NULL);
pgdp = pgd_offset_k(addr);
pudp = pud_offset(pgdp, addr);
pmdp = pmd_offset(pudp, addr);
ptep = pte_offset_kernel(pmdp, addr);
return pte_val(*ptep) & mask;
}
/* If not locked, zap it. */
void __flush_tlb_all(void)
{

14
include/asm-sparc64/pgtable.h
View File

@ -737,20 +737,6 @@ extern unsigned long pte_file(pte_t);
extern pte_t pgoff_to_pte(unsigned long);
#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
extern unsigned long prom_virt_to_phys(unsigned long, int *);
extern unsigned long sun4u_get_pte(unsigned long);
static inline unsigned long __get_phys(unsigned long addr)
{
return sun4u_get_pte(addr);
}
static inline int __get_iospace(unsigned long addr)
{
return ((sun4u_get_pte(addr) & 0xf0000000) >> 28);
}
extern unsigned long *sparc64_valid_addr_bitmap;
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */