forked from luck/tmp_suning_uos_patched
igb: shorten maximum PHC timecounter update interval
The timecounter needs to be updated at least once per ~550 seconds in
order to avoid a 40-bit SYSTIM timestamp to be misinterpreted as an old
timestamp.
Since commit 500462a9de
("timers: Switch to a non-cascading wheel"),
scheduling of delayed work seems to be less accurate and a requested
delay of 540 seconds may actually be longer than 550 seconds. Also, the
PHC may be adjusted to run up to 6% faster than real time and the system
clock up to 10% slower. Shorten the delay to 360 seconds to be sure the
timecounter is updated in time.
This fixes an issue with HW timestamps on 82580/I350/I354 being off by
~1100 seconds for few seconds every ~9 minutes.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Miroslav Lichvar <mlichvar@redhat.com>
Acked-by: Jacob Keller <jacob.e.keller@intel.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
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@ -53,13 +53,15 @@
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* 2^40 * 10^-9 / 60 = 18.3 minutes.
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*
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* SYSTIM is converted to real time using a timecounter. As
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* timecounter_cyc2time() allows old timestamps, the timecounter
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* needs to be updated at least once per half of the SYSTIM interval.
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* Scheduling of delayed work is not very accurate, so we aim for 8
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* minutes to be sure the actual interval is shorter than 9.16 minutes.
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* timecounter_cyc2time() allows old timestamps, the timecounter needs
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* to be updated at least once per half of the SYSTIM interval.
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* Scheduling of delayed work is not very accurate, and also the NIC
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* clock can be adjusted to run up to 6% faster and the system clock
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* up to 10% slower, so we aim for 6 minutes to be sure the actual
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* interval in the NIC time is shorter than 9.16 minutes.
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*/
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#define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 8)
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#define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 6)
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#define IGB_PTP_TX_TIMEOUT (HZ * 15)
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#define INCPERIOD_82576 BIT(E1000_TIMINCA_16NS_SHIFT)
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#define INCVALUE_82576_MASK GENMASK(E1000_TIMINCA_16NS_SHIFT - 1, 0)
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