forked from luck/tmp_suning_uos_patched
[POWERPC] mpc52xx_psc_spi device driver must not touch port_config and cdm
It is dangerous for an mpc52xx device driver to modify the port_config register. If the driver is probed incorrectly, it will change the pin IO configuration in ways which may not be compatible with the board. port_config should be set up by the bootloader, or failing that, in the platform setup code in arch/powerpc/platforms/52xx. Also, modifying CDM registers directly can cause a race condition with other drivers. Instead call a common routine to modify CDM settings. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Dragos Carp <dragos.carp@toptica.com>
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c8004a2818
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4fb4c55824
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@ -330,80 +330,13 @@ static void mpc52xx_psc_spi_cleanup(struct spi_device *spi)
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static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
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{
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struct device_node *np;
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struct mpc52xx_cdm __iomem *cdm;
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struct mpc52xx_gpio __iomem *gpio;
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struct mpc52xx_psc __iomem *psc = mps->psc;
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u32 ul;
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u32 mclken_div;
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int ret = 0;
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#if defined(CONFIG_PPC_MERGE)
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np = of_find_compatible_node(NULL, NULL, "mpc5200-cdm");
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cdm = of_iomap(np, 0);
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of_node_put(np);
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np = of_find_compatible_node(NULL, NULL, "mpc5200-gpio");
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gpio = of_iomap(np, 0);
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of_node_put(np);
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#else
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cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
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gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
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#endif
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if (!cdm || !gpio) {
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printk(KERN_ERR "Error mapping CDM/GPIO\n");
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ret = -EFAULT;
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goto unmap_regs;
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}
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/* default sysclk is 512MHz */
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mclken_div = 0x8000 |
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(((mps->sysclk ? mps->sysclk : 512000000) / MCLK) & 0x1FF);
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switch (psc_id) {
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case 1:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFFFF8;
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ul |= 0x00000006;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc1, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000020;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 2:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFFF8F;
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ul |= 0x00000060;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc2, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000040;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 3:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFFFFF0FF;
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ul |= 0x00000600;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc3, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000080;
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out_be32(&cdm->clk_enables, ul);
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break;
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case 6:
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ul = in_be32(&gpio->port_config);
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ul &= 0xFF8FFFFF;
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ul |= 0x00700000;
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out_be32(&gpio->port_config, ul);
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out_be16(&cdm->mclken_div_psc6, mclken_div);
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ul = in_be32(&cdm->clk_enables);
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ul |= 0x00000010;
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out_be32(&cdm->clk_enables, ul);
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break;
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default:
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ret = -EINVAL;
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goto unmap_regs;
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}
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mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
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mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
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/* Reset the PSC into a known state */
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out_8(&psc->command, MPC52xx_PSC_RST_RX);
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@ -427,12 +360,6 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
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mps->bits_per_word = 8;
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unmap_regs:
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if (cdm)
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iounmap(cdm);
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if (gpio)
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iounmap(gpio);
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return ret;
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}
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