forked from luck/tmp_suning_uos_patched
tools headers barrier: Fix arm64 tools build failure wrt smp_load_{acquire,release}
Cheers for reporting this. I managed to reproduce the build failure with gcc version 6.3.0 20170516 (Debian 6.3.0-18+deb9u1). The code in question is the arm64 versions of smp_load_acquire() and smp_store_release(). Unlike other architectures, these are not built around READ_ONCE() and WRITE_ONCE() since we have instructions we can use instead of fences. Bringing our macros up-to-date with those (i.e. tweaking the union initialisation and using the special "uXX_alias_t" types) appears to fix the issue for me. Committer notes: Testing it in the systems previously failing: # time dm android-ndk:r12b-arm \ android-ndk:r15c-arm \ debian:experimental-x-arm64 \ ubuntu:14.04.4-x-linaro-arm64 \ ubuntu:16.04-x-arm \ ubuntu:16.04-x-arm64 \ ubuntu:18.04-x-arm \ ubuntu:18.04-x-arm64 1 android-ndk:r12b-arm : Ok arm-linux-androideabi-gcc (GCC) 4.9.x 20150123 (prerelease) 2 android-ndk:r15c-arm : Ok arm-linux-androideabi-gcc (GCC) 4.9.x 20150123 (prerelease) 3 debian:experimental-x-arm64 : Ok aarch64-linux-gnu-gcc (Debian 8.2.0-7) 8.2.0 4 ubuntu:14.04.4-x-linaro-arm64 : Ok aarch64-linux-gnu-gcc (Linaro GCC 5.5-2017.10) 5.5.0 5 ubuntu:16.04-x-arm : Ok arm-linux-gnueabihf-gcc (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.9) 5.4.0 20160609 6 ubuntu:16.04-x-arm64 : Ok aarch64-linux-gnu-gcc (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.9) 5.4.0 20160609 7 ubuntu:18.04-x-arm : Ok arm-linux-gnueabihf-gcc (Ubuntu/Linaro 7.3.0-27ubuntu1~18.04) 7.3.0 8 ubuntu:18.04-x-arm64 : Ok aarch64-linux-gnu-gcc (Ubuntu/Linaro 7.3.0-27ubuntu1~18.04) 7.3.0 Reported-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Tested-by: Daniel Borkmann <daniel@iogearbox.net> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20181031174408.GA27871@arm.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -14,74 +14,75 @@
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#define wmb() asm volatile("dmb ishst" ::: "memory")
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#define rmb() asm volatile("dmb ishld" ::: "memory")
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#define smp_store_release(p, v) \
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do { \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__val = (__force typeof(*p)) (v) }; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("stlrb %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u8 *)__u.__c) \
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: "memory"); \
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break; \
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case 2: \
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asm volatile ("stlrh %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u16 *)__u.__c) \
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: "memory"); \
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break; \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u32 *)__u.__c) \
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: "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u64 *)__u.__c) \
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: "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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#define smp_store_release(p, v) \
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do { \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__val = (v) }; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("stlrb %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u8_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 2: \
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asm volatile ("stlrh %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u16_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u32_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) \
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: "r" (*(__u64_alias_t *)__u.__c) \
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: "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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union { typeof(*p) __val; char __c[1]; } __u; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("ldarb %w0, %1" \
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: "=r" (*(__u8 *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 2: \
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asm volatile ("ldarh %w0, %1" \
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: "=r" (*(__u16 *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (*(__u32 *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (*(__u64 *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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__u.__val; \
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#define smp_load_acquire(p) \
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({ \
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union { typeof(*p) __val; char __c[1]; } __u = \
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{ .__c = { 0 } }; \
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\
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switch (sizeof(*p)) { \
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case 1: \
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asm volatile ("ldarb %w0, %1" \
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: "=r" (*(__u8_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 2: \
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asm volatile ("ldarh %w0, %1" \
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: "=r" (*(__u16_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (*(__u32_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (*(__u64_alias_t *)__u.__c) \
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: "Q" (*p) : "memory"); \
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break; \
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default: \
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/* Only to shut up gcc ... */ \
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mb(); \
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break; \
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} \
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__u.__val; \
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})
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#endif /* _TOOLS_LINUX_ASM_AARCH64_BARRIER_H */
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