AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

pinctrl: Add pinctrl-aspeed-g4 driver

Browse Source 
A subset of the pins and functions are exposed. The selection of
functions and pins is driven by the development of OpenBMC[1] on the
AST2400 SoC, particularly around booting the OpenPOWER Palmetto
development machine.

[1] https://github.com/openbmc/docs

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Andrew Jeffery 2016-08-30 17:24:25 +09:30 committed by Linus Walleij
parent 4d3d0e4272
commit 524594d401
3 changed files with 1240 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/pinctrl/aspeed/Kconfig
View File

@ -6,3 +6,11 @@ config PINCTRL_ASPEED
select PINCONF
select GENERIC_PINCONF
select REGMAP_MMIO
config PINCTRL_ASPEED_G4
bool "Aspeed G4 SoC pin control"
depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF
select PINCTRL_ASPEED
help
Say Y here to enable pin controller support for Aspeed's 4th
generation SoCs. GPIO is provided by a separate GPIO driver.

1
drivers/pinctrl/aspeed/Makefile
View File

@ -2,3 +2,4 @@
ccflags-y += -Woverride-init
obj-$(CONFIG_PINCTRL_ASPEED) += pinctrl-aspeed.o
obj-$(CONFIG_PINCTRL_ASPEED_G4) += pinctrl-aspeed-g4.o

1231
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c Normal file
View File

File diff suppressed because it is too large Load Diff