forked from luck/tmp_suning_uos_patched
ASoC: Intel: Use a table for ADSP SRAM shift
Use a table for ADSP IRAM/DRAM bit shift. Signed-off-by: Jie Yang <yang.jie@intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -337,21 +337,40 @@ static int hsw_acpi_resource_map(struct sst_dsp *sst, struct sst_pdata *pdata)
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return 0;
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}
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struct sst_sram_shift {
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u32 dev_id; /* SST Device IDs */
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u32 iram_shift;
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u32 dram_shift;
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};
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static const struct sst_sram_shift sram_shift[] = {
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{SST_DEV_ID_LYNX_POINT, 6, 16}, /* lp */
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{SST_DEV_ID_WILDCAT_POINT, 2, 12}, /* wpt */
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};
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static u32 hsw_block_get_bit(struct sst_mem_block *block)
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{
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u32 bit = 0, shift = 0;
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u32 bit = 0, shift = 0, index;
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struct sst_dsp *sst = block->dsp;
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switch (block->type) {
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case SST_MEM_DRAM:
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shift = 16;
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break;
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case SST_MEM_IRAM:
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shift = 6;
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break;
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default:
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return 0;
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for (index = 0; index < ARRAY_SIZE(sram_shift); index++) {
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if (sram_shift[index].dev_id == sst->id)
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break;
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}
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if (index < ARRAY_SIZE(sram_shift)) {
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switch (block->type) {
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case SST_MEM_DRAM:
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shift = sram_shift[index].dram_shift;
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break;
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case SST_MEM_IRAM:
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shift = sram_shift[index].iram_shift;
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break;
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default:
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shift = 0;
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}
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} else
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shift = 0;
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bit = 1 << (block->index + shift);
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return bit;
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