AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

sh: SH-5 uses a 64-bit PTE_MAGNITUDE, as X2 TLB.

Browse Source 
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2007-11-21 16:19:12 +09:00
parent c96bcf958c
commit 55183e9bb2
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/asm-sh/pgtable.h
View File

@ -49,7 +49,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
* traditional two-level paging structure
*/
/* PTE bits */
#ifdef CONFIG_X2TLB
#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
#else
# define PTE_MAGNITUDE 2 /* 32-bit PTEs */