forked from luck/tmp_suning_uos_patched
[PATCH] x86-64: improved iommu documentation
- add SWIOTLB config help text - mention Documentation/x86_64/boot-options.txt in Documentation/kernel-parameters.txt - remove the duplication of the iommu kernel parameter documentation. - Better explanation of some of the iommu kernel parameter options. - "32MB<<order" instead of "32MB^order". - Mention the default "order" value. - list the four existing PCI-DMA mapping implementations of arch x86_64 - group the iommu= option keywords by PCI-DMA mapping implementation. - Distinguish iommu= option keywords from number arguments. - Explain the meaning of DAC and SAC. Signed-off-by: Karsten Weiss <knweiss@science-computing.de> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Muli Ben-Yehuda <muli@il.ibm.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
This commit is contained in:
Karsten Weiss
Andi Kleen
parent
5809f9d442
commit
5558870bfb
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@ -104,6 +104,9 @@ loader, and have no meaning to the kernel directly.
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Do not modify the syntax of boot loader parameters without extreme
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need or coordination with <Documentation/i386/boot.txt>.
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There are also arch-specific kernel-parameters not documented here.
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See for example <Documentation/x86_64/boot-options.txt>.
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Note that ALL kernel parameters listed below are CASE SENSITIVE, and that
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a trailing = on the name of any parameter states that that parameter will
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be entered as an environment variable, whereas its absence indicates that
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@ -180,40 +180,81 @@ PCI
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pci=lastbus=NUMBER Scan upto NUMBER busses, no matter what the mptable says.
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pci=noacpi Don't use ACPI to set up PCI interrupt routing.
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IOMMU
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IOMMU (input/output memory management unit)
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iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]][,merge]
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[,forcesac][,fullflush][,nomerge][,noaperture][,calgary]
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size set size of iommu (in bytes)
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noagp don't initialize the AGP driver and use full aperture.
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off don't use the IOMMU
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leak turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
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memaper[=order] allocate an own aperture over RAM with size 32MB^order.
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noforce don't force IOMMU usage. Default.
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force Force IOMMU.
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merge Do SG merging. Implies force (experimental)
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nomerge Don't do SG merging.
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forcesac For SAC mode for masks <40bits (experimental)
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fullflush Flush IOMMU on each allocation (default)
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nofullflush Don't use IOMMU fullflush
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allowed overwrite iommu off workarounds for specific chipsets.
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soft Use software bounce buffering (default for Intel machines)
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noaperture Don't touch the aperture for AGP.
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allowdac Allow DMA >4GB
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When off all DMA over >4GB is forced through an IOMMU or bounce
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buffering.
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nodac Forbid DMA >4GB
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panic Always panic when IOMMU overflows
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calgary Use the Calgary IOMMU if it is available
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Currently four x86-64 PCI-DMA mapping implementations exist:
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swiotlb=pages[,force]
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1. <arch/x86_64/kernel/pci-nommu.c>: use no hardware/software IOMMU at all
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(e.g. because you have < 3 GB memory).
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Kernel boot message: "PCI-DMA: Disabling IOMMU"
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pages Prereserve that many 128K pages for the software IO bounce buffering.
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force Force all IO through the software TLB.
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2. <arch/x86_64/kernel/pci-gart.c>: AMD GART based hardware IOMMU.
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Kernel boot message: "PCI-DMA: using GART IOMMU"
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calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
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calgary=[translate_empty_slots]
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calgary=[disable=<PCI bus number>]
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3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
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e.g. if there is no hardware IOMMU in the system and it is need because
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you have >3GB memory or told the kernel to us it (iommu=soft))
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Kernel boot message: "PCI-DMA: Using software bounce buffering
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for IO (SWIOTLB)"
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4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
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pSeries and xSeries servers. This hardware IOMMU supports DMA address
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mapping with memory protection, etc.
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Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
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iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
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[,memaper[=<order>]][,merge][,forcesac][,fullflush][,nomerge]
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[,noaperture][,calgary]
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General iommu options:
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off Don't initialize and use any kind of IOMMU.
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noforce Don't force hardware IOMMU usage when it is not needed.
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(default).
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force Force the use of the hardware IOMMU even when it is
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not actually needed (e.g. because < 3 GB memory).
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soft Use software bounce buffering (SWIOTLB) (default for
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Intel machines). This can be used to prevent the usage
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of an available hardware IOMMU.
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iommu options only relevant to the AMD GART hardware IOMMU:
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<size> Set the size of the remapping area in bytes.
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allowed Overwrite iommu off workarounds for specific chipsets.
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fullflush Flush IOMMU on each allocation (default).
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nofullflush Don't use IOMMU fullflush.
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leak Turn on simple iommu leak tracing (only when
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CONFIG_IOMMU_LEAK is on). Default number of leak pages
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is 20.
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memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order.
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(default: order=1, i.e. 64MB)
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merge Do scather-gather (SG) merging. Implies "force"
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(experimental).
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nomerge Don't do scather-gather (SG) merging.
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noaperture Ask the IOMMU not to touch the aperture for AGP.
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forcesac Force single-address cycle (SAC) mode for masks <40bits
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(experimental).
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noagp Don't initialize the AGP driver and use full aperture.
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allowdac Allow double-address cycle (DAC) mode, i.e. DMA >4GB.
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DAC is used with 32-bit PCI to push a 64-bit address in
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two cycles. When off all DMA over >4GB is forced through
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an IOMMU or software bounce buffering.
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nodac Forbid DAC mode, i.e. DMA >4GB.
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panic Always panic when IOMMU overflows.
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calgary Use the Calgary IOMMU if it is available
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iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
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implementation:
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swiotlb=<pages>[,force]
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<pages> Prereserve that many 128K pages for the software IO
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bounce buffering.
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force Force all IO through the software TLB.
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Settings for the IBM Calgary hardware IOMMU currently found in IBM
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pSeries and xSeries machines:
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calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
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calgary=[translate_empty_slots]
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calgary=[disable=<PCI bus number>]
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panic Always panic when IOMMU overflows
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64k,...,8M - Set the size of each PCI slot's translation table
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when using the Calgary IOMMU. This is the size of the translation
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@ -458,8 +458,8 @@ config IOMMU
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on systems with more than 3GB. This is usually needed for USB,
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sound, many IDE/SATA chipsets and some other devices.
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Provides a driver for the AMD Athlon64/Opteron/Turion/Sempron GART
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based IOMMU and a software bounce buffer based IOMMU used on Intel
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systems and as fallback.
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based hardware IOMMU and a software bounce buffer based IOMMU used
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on Intel systems and as fallback.
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The code is only active when needed (enough memory and limited
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device) unless CONFIG_IOMMU_DEBUG or iommu=force is specified
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too.
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@ -496,6 +496,12 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT
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# need this always selected by IOMMU for the VIA workaround
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config SWIOTLB
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bool
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help
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Support for software bounce buffers used on x86-64 systems
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which don't have a hardware IOMMU (e.g. the current generation
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of Intel's x86-64 CPUs). Using this PCI devices which can only
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access 32-bits of memory can be used on systems with more than
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3 GB of memory. If unsure, say Y.
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config X86_MCE
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bool "Machine check support" if EMBEDDED
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@ -223,30 +223,10 @@ int dma_set_mask(struct device *dev, u64 mask)
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}
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EXPORT_SYMBOL(dma_set_mask);
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/* iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]][,merge]
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[,forcesac][,fullflush][,nomerge][,biomerge]
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size set size of iommu (in bytes)
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noagp don't initialize the AGP driver and use full aperture.
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off don't use the IOMMU
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leak turn on simple iommu leak tracing (only when CONFIG_IOMMU_LEAK is on)
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memaper[=order] allocate an own aperture over RAM with size 32MB^order.
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noforce don't force IOMMU usage. Default.
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force Force IOMMU.
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merge Do lazy merging. This may improve performance on some block devices.
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Implies force (experimental)
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biomerge Do merging at the BIO layer. This is more efficient than merge,
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but should be only done with very big IOMMUs. Implies merge,force.
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nomerge Don't do SG merging.
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forcesac For SAC mode for masks <40bits (experimental)
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fullflush Flush IOMMU on each allocation (default)
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nofullflush Don't use IOMMU fullflush
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allowed overwrite iommu off workarounds for specific chipsets.
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soft Use software bounce buffering (default for Intel machines)
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noaperture Don't touch the aperture for AGP.
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allowdac Allow DMA >4GB
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nodac Forbid DMA >4GB
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panic Force panic when IOMMU overflows
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*/
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/*
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* See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
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* documentation.
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*/
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__init int iommu_setup(char *p)
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{
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iommu_merge = 1;
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