forked from luck/tmp_suning_uos_patched
V4L/DVB (5172): Pvrusb2: Control protocol cleanup
Several special-case FX2 commands were being issued through pvr2_write_u16() and pvr2_write_8(), but there's really nothing special case about them. These date from a very early time in the driver development. This patch removes these functions and replaces their use with calls to pvr2_send_request. Signed-off-by: Mike Isely <isely@pobox.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -29,6 +29,7 @@
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#define FX2CMD_REG_WRITE 0x04
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#define FX2CMD_REG_WRITE 0x04
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#define FX2CMD_REG_READ 0x05
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#define FX2CMD_REG_READ 0x05
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#define FX2CMD_MEMSEL 0x06
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#define FX2CMD_I2C_WRITE 0x08
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#define FX2CMD_I2C_WRITE 0x08
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#define FX2CMD_I2C_READ 0x09
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#define FX2CMD_I2C_READ 0x09
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@ -38,6 +39,8 @@
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#define FX2CMD_STREAMING_ON 0x36
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#define FX2CMD_STREAMING_ON 0x36
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#define FX2CMD_STREAMING_OFF 0x37
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#define FX2CMD_STREAMING_OFF 0x37
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#define FX2CMD_FWPOST1 0x52
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#define FX2CMD_POWER_OFF 0xdc
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#define FX2CMD_POWER_OFF 0xdc
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#define FX2CMD_POWER_ON 0xde
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#define FX2CMD_POWER_ON 0xde
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@ -271,8 +271,6 @@ static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
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unsigned int timeout,int probe_fl,
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unsigned int timeout,int probe_fl,
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void *write_data,unsigned int write_len,
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void *write_data,unsigned int write_len,
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void *read_data,unsigned int read_len);
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void *read_data,unsigned int read_len);
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static int pvr2_write_u16(struct pvr2_hdw *hdw, u16 data, int res);
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static int pvr2_write_u8(struct pvr2_hdw *hdw, u8 data, int res);
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static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp)
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static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp)
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{
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{
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@ -1248,8 +1246,13 @@ int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
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ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
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ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
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ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
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ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
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ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
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ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
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ret |= pvr2_write_u8(hdw, 0x52, 0);
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LOCK_TAKE(hdw->ctl_lock); do {
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ret |= pvr2_write_u16(hdw, 0x0600, 0);
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hdw->cmd_buffer[0] = FX2CMD_FWPOST1;
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ret |= pvr2_send_request(hdw,hdw->cmd_buffer,1,0,0);
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hdw->cmd_buffer[0] = FX2CMD_MEMSEL;
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hdw->cmd_buffer[1] = 0;
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ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,0,0);
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} while (0); LOCK_GIVE(hdw->ctl_lock);
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if (ret) {
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if (ret) {
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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@ -1311,7 +1314,11 @@ int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
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ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
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ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
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ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
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ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
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ret |= pvr2_write_u16(hdw, 0x0600, 0);
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LOCK_TAKE(hdw->ctl_lock); do {
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hdw->cmd_buffer[0] = FX2CMD_MEMSEL;
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hdw->cmd_buffer[1] = 0;
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ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,0,0);
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} while (0); LOCK_GIVE(hdw->ctl_lock);
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if (ret) {
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if (ret) {
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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@ -3016,39 +3023,6 @@ static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data)
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}
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}
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static int pvr2_write_u16(struct pvr2_hdw *hdw, u16 data, int res)
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{
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int ret;
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LOCK_TAKE(hdw->ctl_lock);
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hdw->cmd_buffer[0] = (data >> 8) & 0xff;
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hdw->cmd_buffer[1] = data & 0xff;
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ret = pvr2_send_request(hdw, hdw->cmd_buffer, 2, hdw->cmd_buffer, res);
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LOCK_GIVE(hdw->ctl_lock);
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return ret;
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}
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static int pvr2_write_u8(struct pvr2_hdw *hdw, u8 data, int res)
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{
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int ret;
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LOCK_TAKE(hdw->ctl_lock);
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hdw->cmd_buffer[0] = data;
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ret = pvr2_send_request(hdw, hdw->cmd_buffer, 1, hdw->cmd_buffer, res);
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LOCK_GIVE(hdw->ctl_lock);
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return ret;
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}
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static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw)
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static void pvr2_hdw_render_useless_unlocked(struct pvr2_hdw *hdw)
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{
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{
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if (!hdw->flag_ok) return;
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if (!hdw->flag_ok) return;
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