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MIPS: Alchemy: platform: use clk framework for uarts

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Use the clock framework to get the rate of the peripheral clock.
Remove the now obsolete get_uart_baud_base function.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7468/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss 2014-07-23 16:36:49 +02:00 committed by Ralf Baechle
parent 474402291a
commit 5a2fb71e73
3 changed files with 12 additions and 22 deletions
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19
arch/mips/alchemy/common/clocks.c
View File

@ -38,7 +38,6 @@
#define AU1000_SRC_CLK 12000000
static unsigned int au1x00_clock; /* Hz */
static unsigned long uart_baud_base;
/*
* Set the au1000_clock
@ -54,21 +53,6 @@ unsigned int get_au1x00_speed(void)
}
EXPORT_SYMBOL(get_au1x00_speed);
/*
* The UART baud base is not known at compile time ... if
* we want to be able to use the same code on different
* speed CPUs.
*/
unsigned long get_au1x00_uart_baud_base(void)
{
return uart_baud_base;
}
void set_au1x00_uart_baud_base(unsigned long new_baud_base)
{
uart_baud_base = new_baud_base;
}
/*
* We read the real processor speed from the PLL. This is important
* because it is more accurate than computing it from the 32 KHz
@ -95,9 +79,6 @@ unsigned long au1xxx_calc_clock(void)
/* On Alchemy CPU:counter ratio is 1:1 */
mips_hpt_frequency = cpu_speed;
/* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
set_au1x00_uart_baud_base(cpu_speed / (2 *
((alchemy_rdsys(AU1000_SYS_POWERCTRL) & 0x03) + 2) * 16));
set_au1x00_speed(cpu_speed);

13
arch/mips/alchemy/common/platform.c
View File

@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
@ -99,10 +100,20 @@ static struct platform_device au1xx0_uart_device = {
static void __init alchemy_setup_uarts(int ctype)
{
unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
long uartclk;
int s = sizeof(struct plat_serial8250_port);
int c = alchemy_get_uarts(ctype);
struct plat_serial8250_port *ports;
struct clk *clk = clk_get(NULL, ALCHEMY_PERIPH_CLK);
if (IS_ERR(clk))
return;
if (clk_prepare_enable(clk)) {
clk_put(clk);
return;
}
uartclk = clk_get_rate(clk);
clk_put(clk);
ports = kzalloc(s * (c + 1), GFP_KERNEL);
if (!ports) {

2
arch/mips/include/asm/mach-au1x00/au1000.h
View File

@ -844,8 +844,6 @@ static inline int alchemy_get_macs(int type)
/* arch/mips/au1000/common/clocks.c */
extern void set_au1x00_speed(unsigned int new_freq);
extern unsigned int get_au1x00_speed(void);
extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
extern unsigned long get_au1x00_uart_baud_base(void);
extern unsigned long au1xxx_calc_clock(void);
/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */