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clk: bcm2835: Mark PLLD_PER as CRITICAL

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The VPU firmware assume that the PLLD_PER isn't modified by the ARM core.
Otherwise this could cause firmware lookups. So mark the clock as critical
to avoid this.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Stefan Wahren 2019-08-18 18:23:44 +02:00 committed by Stephen Boyd
parent 42de9ad400
commit 5c5ba218c6
1 changed files with 6 additions and 1 deletions
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7
drivers/clk/bcm/clk-bcm2835.c
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@ -1776,6 +1776,11 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.hold_mask = CM_PLLD_HOLDCORE, .hold_mask = CM_PLLD_HOLDCORE,
.fixed_divider = 1, .fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT), .flags = CLK_SET_RATE_PARENT),
/*
* VPU firmware assumes that PLLD_PER isn't disabled by the ARM core.
* Otherwise this could cause firmware lookups. That's why we mark
* it as critical.
*/
[BCM2835_PLLD_PER] = REGISTER_PLL_DIV( [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
SOC_ALL, SOC_ALL,
.name = "plld_per", .name = "plld_per",
@ -1785,7 +1790,7 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
.load_mask = CM_PLLD_LOADPER, .load_mask = CM_PLLD_LOADPER,
.hold_mask = CM_PLLD_HOLDPER, .hold_mask = CM_PLLD_HOLDPER,
.fixed_divider = 1, .fixed_divider = 1,
.flags = CLK_SET_RATE_PARENT), .flags = CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
[BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
SOC_ALL, SOC_ALL,
.name = "plld_dsi0", .name = "plld_dsi0",