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coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35

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Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs.
While at it add a helper macro to make it easier to add the new
entries.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suzuki K Poulose 2018-07-11 13:40:14 -06:00 committed by Greg Kroah-Hartman
parent 25b4a2b909
commit 5cedd22370
1 changed files with 14 additions and 17 deletions
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31
drivers/hwtracing/coresight/coresight-etm4x.c
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@ -1027,7 +1027,8 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
}
pm_runtime_put(&adev->dev);
dev_info(dev, "%s initialized\n", (char *)id->data);
dev_info(dev, "CPU%d: ETM v%d.%d initialized\n",
drvdata->cpu, drvdata->arch >> 4, drvdata->arch & 0xf);
if (boot_enable) {
coresight_enable(drvdata->csdev);
@ -1045,23 +1046,19 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
}
#define ETM4x_AMBA_ID(pid) \
{ \
.id = pid, \
.mask = 0x000fffff, \
}
static const struct amba_id etm4_ids[] = {
{ /* ETM 4.0 - Cortex-A53 */
.id = 0x000bb95d,
.mask = 0x000fffff,
.data = "ETM 4.0",
},
{ /* ETM 4.0 - Cortex-A57 */
.id = 0x000bb95e,
.mask = 0x000fffff,
.data = "ETM 4.0",
},
{ /* ETM 4.0 - A72, Maia, HiSilicon */
.id = 0x000bb95a,
.mask = 0x000fffff,
.data = "ETM 4.0",
},
{ 0, 0},
ETM4x_AMBA_ID(0x000bb95d), /* Cortex-A53 */
ETM4x_AMBA_ID(0x000bb95e), /* Cortex-A57 */
ETM4x_AMBA_ID(0x000bb95a), /* Cortex-A72 */
ETM4x_AMBA_ID(0x000bb959), /* Cortex-A73 */
ETM4x_AMBA_ID(0x000bb9da), /* Cortex-A35 */
{},
};
static struct amba_driver etm4x_driver = {