AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Microblaze patches for 4.19-rc1

Browse Source 
- use generic noncoherent direct mapping
 - use LDFLAGS instead of LD
 - pci error path fix
 - remove incorrect comments
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlt7sOgACgkQykllyylKDCGmZQCgh/UHi6akGXvw9n9rUJjsPrTZ
 nL4An1/PL/CMcItcuXqLBXCQuUZ7B7Hb
 =3t/K
 -----END PGP SIGNATURE-----

Merge tag 'microblaze-v4.19-rc1' of git://git.monstr.eu/linux-2.6-microblaze

Pull arch/microblaze updates from Michal Simek:

 - use generic noncoherent direct mapping

 - use LDFLAGS instead of LD

 - pci error path fix

 - remove incorrect comments

* tag 'microblaze-v4.19-rc1' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze/PCI: Remove stale pcibios_align_resource() comment
  microblaze: delete wrong comment about machine_early_init
  microblaze: add endianness options to LDFLAGS instead of LD
  microblaze: remove consistent_sync and consistent_sync_page
  microblaze: use generic dma_noncoherent_ops
  microblaze: warn if of_iomap() failed
This commit is contained in:
Linus Torvalds 2018-08-21 13:18:22 -07:00
commit 5e26830990
10 changed files with 25 additions and 234 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/microblaze/Kconfig
View File

@ -2,6 +2,8 @@ config MICROBLAZE
def_bool y
select ARCH_NO_SWAP
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_NO_COHERENT_DMA_MMAP if !MMU
select ARCH_WANT_IPC_PARSE_VERSION
@ -9,6 +11,8 @@ config MICROBLAZE
select TIMER_OF
select CLONE_BACKWARDS3
select COMMON_CLK
select DMA_NONCOHERENT_OPS
select DMA_NONCOHERENT_MMAP
select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
select GENERIC_CPU_DEVICES

4
arch/microblaze/Makefile
View File

@ -40,11 +40,11 @@ CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
ifdef CONFIG_CPU_BIG_ENDIAN
KBUILD_CFLAGS += -mbig-endian
KBUILD_AFLAGS += -mbig-endian
LD += -EB
LDFLAGS += -EB
else
KBUILD_CFLAGS += -mlittle-endian
KBUILD_AFLAGS += -mlittle-endian
LD += -EL
LDFLAGS += -EL
endif
CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))

1
arch/microblaze/include/asm/Kbuild
View File

@ -5,6 +5,7 @@ generic-y += bugs.h
generic-y += compat.h
generic-y += device.h
generic-y += div64.h
generic-y += dma-mapping.h
generic-y += emergency-restart.h
generic-y += exec.h
generic-y += extable.h

28
arch/microblaze/include/asm/dma-mapping.h
View File

@ -1,28 +0,0 @@
/*
* Implements the generic device dma API for microblaze and the pci
*
* Copyright (C) 2009-2010 Michal Simek <monstr@monstr.eu>
* Copyright (C) 2009-2010 PetaLogix
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
* archive for more details.
*
* This file is base on powerpc and x86 dma-mapping.h versions
* Copyright (C) 2004 IBM
*/
#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
#define _ASM_MICROBLAZE_DMA_MAPPING_H
/*
* Available generic sets of operations
*/
extern const struct dma_map_ops dma_nommu_ops;
static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
{
return &dma_nommu_ops;
}
#endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */

5
arch/microblaze/include/asm/pgtable.h
View File

@ -553,11 +553,6 @@ void __init *early_get_page(void);
extern unsigned long ioremap_bot, ioremap_base;
void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
void consistent_free(size_t size, void *vaddr);
void consistent_sync(void *vaddr, size_t size, int direction);
void consistent_sync_page(struct page *page, unsigned long offset,
size_t size, int direction);
unsigned long consistent_virt_to_pfn(void *vaddr);
void setup_memory(void);

144
arch/microblaze/kernel/dma.c
View File

@ -8,29 +8,15 @@
*/
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/dma-noncoherent.h>
#include <linux/gfp.h>
#include <linux/dma-debug.h>
#include <linux/export.h>
#include <linux/bug.h>
#include <asm/cacheflush.h>
static void *dma_nommu_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag,
unsigned long attrs)
{
return consistent_alloc(flag, size, dma_handle);
}
static void dma_nommu_free_coherent(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle,
unsigned long attrs)
{
consistent_free(size, vaddr);
}
static inline void __dma_sync(unsigned long paddr,
size_t size, enum dma_data_direction direction)
static void __dma_sync(struct device *dev, phys_addr_t paddr, size_t size,
enum dma_data_direction direction)
{
switch (direction) {
case DMA_TO_DEVICE:
@ -45,113 +31,21 @@ static inline void __dma_sync(unsigned long paddr,
}
}
static int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
int nents, enum dma_data_direction direction,
unsigned long attrs)
void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
size_t size, enum dma_data_direction dir)
{
struct scatterlist *sg;
int i;
/* FIXME this part of code is untested */
for_each_sg(sgl, sg, nents, i) {
sg->dma_address = sg_phys(sg);
if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
continue;
__dma_sync(sg_phys(sg), sg->length, direction);
}
return nents;
__dma_sync(dev, paddr, size, dir);
}
static inline dma_addr_t dma_nommu_map_page(struct device *dev,
struct page *page,
unsigned long offset,
size_t size,
enum dma_data_direction direction,
unsigned long attrs)
void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
size_t size, enum dma_data_direction dir)
{
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
__dma_sync(page_to_phys(page) + offset, size, direction);
return page_to_phys(page) + offset;
__dma_sync(dev, paddr, size, dir);
}
static inline void dma_nommu_unmap_page(struct device *dev,
dma_addr_t dma_address,
size_t size,
enum dma_data_direction direction,
unsigned long attrs)
{
/* There is not necessary to do cache cleanup
*
* phys_to_virt is here because in __dma_sync_page is __virt_to_phys and
* dma_address is physical address
*/
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
__dma_sync(dma_address, size, direction);
}
static inline void
dma_nommu_sync_single_for_cpu(struct device *dev,
dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
/*
* It's pointless to flush the cache as the memory segment
* is given to the CPU
*/
if (direction == DMA_FROM_DEVICE)
__dma_sync(dma_handle, size, direction);
}
static inline void
dma_nommu_sync_single_for_device(struct device *dev,
dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
/*
* It's pointless to invalidate the cache if the device isn't
* supposed to write to the relevant region
*/
if (direction == DMA_TO_DEVICE)
__dma_sync(dma_handle, size, direction);
}
static inline void
dma_nommu_sync_sg_for_cpu(struct device *dev,
struct scatterlist *sgl, int nents,
enum dma_data_direction direction)
{
struct scatterlist *sg;
int i;
/* FIXME this part of code is untested */
if (direction == DMA_FROM_DEVICE)
for_each_sg(sgl, sg, nents, i)
__dma_sync(sg->dma_address, sg->length, direction);
}
static inline void
dma_nommu_sync_sg_for_device(struct device *dev,
struct scatterlist *sgl, int nents,
enum dma_data_direction direction)
{
struct scatterlist *sg;
int i;
/* FIXME this part of code is untested */
if (direction == DMA_TO_DEVICE)
for_each_sg(sgl, sg, nents, i)
__dma_sync(sg->dma_address, sg->length, direction);
}
static
int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t handle, size_t size,
unsigned long attrs)
int arch_dma_mmap(struct device *dev, struct vm_area_struct *vma,
void *cpu_addr, dma_addr_t handle, size_t size,
unsigned long attrs)
{
#ifdef CONFIG_MMU
unsigned long user_count = vma_pages(vma);
@ -170,17 +64,3 @@ int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
return -ENXIO;
#endif
}
const struct dma_map_ops dma_nommu_ops = {
.alloc = dma_nommu_alloc_coherent,
.free = dma_nommu_free_coherent,
.mmap = dma_nommu_mmap_coherent,
.map_sg = dma_nommu_map_sg,
.map_page = dma_nommu_map_page,
.unmap_page = dma_nommu_unmap_page,
.sync_single_for_cpu = dma_nommu_sync_single_for_cpu,
.sync_single_for_device = dma_nommu_sync_single_for_device,
.sync_sg_for_cpu = dma_nommu_sync_sg_for_cpu,
.sync_sg_for_device = dma_nommu_sync_sg_for_device,
};
EXPORT_SYMBOL(dma_nommu_ops);

5
arch/microblaze/kernel/head.S
View File

@ -341,11 +341,6 @@ start_here:
/* Initialize r31 with current task address */
addik r31, r0, init_task
/*
* Call platform dependent initialize function.
* Please see $(ARCH)/mach-$(SUBARCH)/setup.c for
* the function.
*/
addik r11, r0, machine_early_init
brald r15, r11
nop

54
arch/microblaze/mm/consistent.c
View File

@ -33,6 +33,7 @@
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/gfp.h>
#include <linux/dma-noncoherent.h>
#include <asm/pgalloc.h>
#include <linux/io.h>
@ -59,7 +60,8 @@
* uncached region. This will no doubt cause big problems if memory allocated
* here is not also freed properly. -- JW
*/
void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
gfp_t gfp, unsigned long attrs)
{
unsigned long order, vaddr;
void *ret;
@ -154,7 +156,6 @@ void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
return ret;
}
EXPORT_SYMBOL(consistent_alloc);
#ifdef CONFIG_MMU
static pte_t *consistent_virt_to_pte(void *vaddr)
@ -178,7 +179,8 @@ unsigned long consistent_virt_to_pfn(void *vaddr)
/*
* free page(s) as defined by the above mapping.
*/
void consistent_free(size_t size, void *vaddr)
void arch_dma_free(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_addr, unsigned long attrs)
{
struct page *page;
@ -218,49 +220,3 @@ void consistent_free(size_t size, void *vaddr)
flush_tlb_all();
#endif
}
EXPORT_SYMBOL(consistent_free);
/*
* make an area consistent.
*/
void consistent_sync(void *vaddr, size_t size, int direction)
{
unsigned long start;
unsigned long end;
start = (unsigned long)vaddr;
/* Convert start address back down to unshadowed memory region */
#ifdef CONFIG_XILINX_UNCACHED_SHADOW
start &= ~UNCACHED_SHADOW_MASK;
#endif
end = start + size;
switch (direction) {
case PCI_DMA_NONE:
BUG();
case PCI_DMA_FROMDEVICE: /* invalidate only */
invalidate_dcache_range(start, end);
break;
case PCI_DMA_TODEVICE: /* writeback only */
flush_dcache_range(start, end);
break;
case PCI_DMA_BIDIRECTIONAL: /* writeback and invalidate */
flush_dcache_range(start, end);
break;
}
}
EXPORT_SYMBOL(consistent_sync);
/*
* consistent_sync_page makes memory consistent. identical
* to consistent_sync, but takes a struct page instead of a
* virtual address
*/
void consistent_sync_page(struct page *page, unsigned long offset,
size_t size, int direction)
{
unsigned long start = (unsigned long)page_address(page) + offset;
consistent_sync((void *)start, size, direction);
}
EXPORT_SYMBOL(consistent_sync_page);

13
arch/microblaze/pci/pci-common.c
View File

@ -597,19 +597,6 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
* addresses to be allocated in the 0x000-0x0ff region
* modulo 0x400.
*
* Why? Because some silly external IO cards only decode
* the low 10 bits of the IO address. The 0x00-0xff region
* is reserved for motherboard devices that decode all 16
* bits, so it's ok to allocate at, say, 0x2800-0x28ff,
* but we want to try to avoid allocating at 0x2900-0x2bff
* which might have be mirrored at 0x0100-0x03ff..
*/
int pcibios_add_device(struct pci_dev *dev)
{
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);

1
arch/microblaze/pci/xilinx_pci.c
View File

@ -157,6 +157,7 @@ void __init xilinx_pci_init(void)
/* Set the max bus number to 255, and bus/subbus no's to 0 */
pci_reg = of_iomap(pci_node, 0);
WARN_ON(!pci_reg);
out_be32(pci_reg + XPLB_PCI_BUS, 0x000000ff);
iounmap(pci_reg);