forked from luck/tmp_suning_uos_patched
scsi: pm80xx: Make mpi_build_cmd locking consistent
[ Upstream commit 7640e1eb8c5de33dafa6c68fd4389214ff9ec1f9 ] Driver submits all internal requests (like abort_task, event acknowledgment etc.) through inbound queue 0. While submitting those, driver does not acquire any lock and this may lead to a race when there is an I/O request coming in on CPU0 and submitted through inbound queue 0. To avoid this, lock acquisition has been moved to pm8001_mpi_build_cmd(). All command submission will go through this path. Link: https://lore.kernel.org/r/20201102165528.26510-2-Viswas.G@microchip.com.com Acked-by: Jack Wang <jinpu.wang@cloud.ionos.com> Signed-off-by: peter chang <dpf@google.com> Signed-off-by: Viswas G <Viswas.G@microchip.com> Signed-off-by: Ruksar Devadi <Ruksar.devadi@microchip.com> Signed-off-by: Radha Ramachandran <radha@google.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -1356,12 +1356,19 @@ int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
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{
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u32 Header = 0, hpriority = 0, bc = 1, category = 0x02;
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void *pMessage;
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unsigned long flags;
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int q_index = circularQ - pm8001_ha->inbnd_q_tbl;
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int rv = -1;
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if (pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
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&pMessage) < 0) {
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WARN_ON(q_index >= PM8001_MAX_INB_NUM);
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spin_lock_irqsave(&circularQ->iq_lock, flags);
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rv = pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size,
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&pMessage);
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if (rv < 0) {
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PM8001_IO_DBG(pm8001_ha,
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pm8001_printk("No free mpi buffer\n"));
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return -ENOMEM;
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pm8001_printk("No free mpi buffer\n"));
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rv = -ENOMEM;
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goto done;
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}
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if (nb > (pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr)))
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@ -1384,7 +1391,9 @@ int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
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pm8001_printk("INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n",
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responseQueue, opCode, circularQ->producer_idx,
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circularQ->consumer_index));
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return 0;
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done:
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spin_unlock_irqrestore(&circularQ->iq_lock, flags);
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return rv;
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}
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u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
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@ -4281,7 +4281,6 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
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char *preq_dma_addr = NULL;
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__le64 tmp_addr;
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u32 i, length;
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unsigned long flags;
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memset(&smp_cmd, 0, sizeof(smp_cmd));
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/*
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@ -4377,10 +4376,8 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha,
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build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag,
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&smp_cmd, pm8001_ha->smp_exp_mode, length);
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spin_lock_irqsave(&circularQ->iq_lock, flags);
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rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd,
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sizeof(smp_cmd), 0);
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spin_unlock_irqrestore(&circularQ->iq_lock, flags);
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if (rc)
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goto err_out_2;
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return 0;
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@ -4444,7 +4441,6 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
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u64 phys_addr, start_addr, end_addr;
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u32 end_addr_high, end_addr_low;
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struct inbound_queue_table *circularQ;
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unsigned long flags;
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u32 q_index, cpu_id;
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u32 opc = OPC_INB_SSPINIIOSTART;
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memset(&ssp_cmd, 0, sizeof(ssp_cmd));
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@ -4582,10 +4578,8 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
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ssp_cmd.esgl = 0;
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}
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}
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spin_lock_irqsave(&circularQ->iq_lock, flags);
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ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
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&ssp_cmd, sizeof(ssp_cmd), q_index);
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spin_unlock_irqrestore(&circularQ->iq_lock, flags);
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return ret;
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}
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@ -4819,10 +4813,8 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
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}
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}
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}
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spin_lock_irqsave(&circularQ->iq_lock, flags);
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ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
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&sata_cmd, sizeof(sata_cmd), q_index);
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spin_unlock_irqrestore(&circularQ->iq_lock, flags);
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return ret;
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}
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