forked from luck/tmp_suning_uos_patched
Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Ingo Molnar: "Three clockevents/clocksource driver fixes" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource: pxa: Fix section mismatch clocksource: mtk: Fix race conditions in probe code clockevents: asm9260: Fix compilation error with sparc/sparc64 allyesconfig
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commit
640c0f5c57
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@ -2,5 +2,7 @@ config MACH_ASM9260
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bool "Alphascale ASM9260"
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depends on ARCH_MULTI_V5
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select CPU_ARM926T
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select ASM9260_TIMER
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select GENERIC_CLOCKEVENTS
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help
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Support for Alphascale ASM9260 based platform.
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@ -63,6 +63,11 @@ config VT8500_TIMER
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config CADENCE_TTC_TIMER
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bool
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config ASM9260_TIMER
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bool
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select CLKSRC_MMIO
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select CLKSRC_OF
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config CLKSRC_NOMADIK_MTU
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bool
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depends on (ARCH_NOMADIK || ARCH_U8500)
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@ -245,15 +250,4 @@ config CLKSRC_PXA
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help
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This enables OST0 support available on PXA and SA-11x0
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platforms.
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config ASM9260_TIMER
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bool "Alphascale ASM9260 timer driver"
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depends on GENERIC_CLOCKEVENTS
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select CLKSRC_MMIO
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select CLKSRC_OF
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default y if MACH_ASM9260
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help
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This enables build of a clocksource and clockevent driver for
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the 32-bit System Timer hardware available on a Alphascale ASM9260.
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endmenu
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@ -224,6 +224,8 @@ static void __init mtk_timer_init(struct device_node *node)
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}
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rate = clk_get_rate(clk);
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mtk_timer_global_reset(evt);
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if (request_irq(evt->dev.irq, mtk_timer_interrupt,
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IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) {
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pr_warn("failed to setup irq %d\n", evt->dev.irq);
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@ -232,8 +234,6 @@ static void __init mtk_timer_init(struct device_node *node)
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evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
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mtk_timer_global_reset(evt);
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/* Configure clock source */
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mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
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clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
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@ -241,10 +241,11 @@ static void __init mtk_timer_init(struct device_node *node)
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/* Configure clock event */
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mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
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mtk_timer_enable_irq(evt, GPT_CLK_EVT);
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clockevents_config_and_register(&evt->dev, rate, 0x3,
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0xffffffff);
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mtk_timer_enable_irq(evt, GPT_CLK_EVT);
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return;
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err_clk_disable:
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@ -163,7 +163,7 @@ static struct irqaction pxa_ost0_irq = {
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.dev_id = &ckevt_pxa_osmr0,
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};
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static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
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static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
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{
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timer_writel(0, OIER);
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timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
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