forked from luck/tmp_suning_uos_patched
MIPS16e2: Provide feature overrides for non-MIPS16 systems
Hardcode the absence of the MIPS16e2 ASE for all the systems that do so for the MIPS16 ASE already, providing for code to be optimized away. Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16097/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -40,6 +40,7 @@
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#endif
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -31,6 +31,7 @@
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -19,6 +19,7 @@
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -37,6 +37,7 @@
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#endif
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -27,6 +27,7 @@
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#define cpu_has_mcheck 0
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#define cpu_has_ejtag 0
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -19,6 +19,7 @@
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#define cpu_has_32fpr 1
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#define cpu_has_counter 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_divec 0
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#define cpu_has_cache_cdex_p 1
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#define cpu_has_prefetch 0
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@ -43,6 +43,7 @@
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#define cpu_has_ejtag 0
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -16,6 +16,7 @@
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*/
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#define cpu_has_watch 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_divec 0
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_p 0
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@ -29,6 +29,7 @@
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#define cpu_has_32fpr 1
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#define cpu_has_counter 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_s 0
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#define cpu_has_mcheck 0
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@ -23,6 +23,7 @@
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#define cpu_has_ejtag 1
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -32,6 +32,7 @@
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#define cpu_has_mcheck 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mips3d 0
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#define cpu_has_mipsmt 0
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#define cpu_has_smartmips 0
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@ -13,6 +13,7 @@
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#define cpu_has_4k_cache 1
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#define cpu_has_watch 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_counter 1
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#define cpu_has_divec 1
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#define cpu_has_vce 0
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@ -48,6 +48,7 @@
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#define cpu_has_llsc 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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@ -17,6 +17,7 @@
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#define cpu_has_counter 1
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#define cpu_has_watch 0
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_divec 0
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#define cpu_has_cache_cdex_p 1
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#define cpu_has_prefetch 0
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*/
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#define cpu_has_watch 1
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_divec 1
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#define cpu_has_vce 0
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#define cpu_has_cache_cdex_p 0
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@ -6,6 +6,7 @@
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#define cpu_has_inclusive_pcaches 0
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#define cpu_has_mips16 0
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#define cpu_has_mips16e2 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips3d 0
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#define cpu_has_smartmips 0
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