forked from luck/tmp_suning_uos_patched
IOMMU Fixes for Linux v4.10-rc2
Three fixes queued up: * Fix an issue with command buffer overflow handling in the AMD IOMMU driver * Add an additional context entry flush to the Intel VT-d driver to make sure any old context entry from kdump copying is flushed out of the cache * Correct the encoding of the PASID table size in the Intel VT-d driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJYb6+0AAoJECvwRC2XARrjDh4QAN6frtp8eu+klRWL2/l3JdZA Iht+HfwC6RCq7Rl8fqqjcfyFXImb+QazfKnyFriH/RxohV9PD5LqLVSmlngoficb vuas7ZQB1+fUUz4pPkJOEium5QhVn+RFHgnJPke685EsASVb9/QJBswzrhAvAM0X RYli/hZ2+MpWeQdmF8pWgO0Dt5ker4bT+9AnYyz8IUJgyQeqZPucoPwksnjvouJz och0IWvfNH3OGRIM5MDpJ5h9W7fdxVL5tS0KJ+NyXLBSqEr7fmKtJgwwxSIOJUIN 7J+1ASu/fHvegCVG9eNELEy9RPKCp/Ju6mgw4AtVDHDG5IRKKX9T/ab+6d3PIPE5 jZxycerGip5NV4TieK9abk9mw4I+NOyKn4OdyC6ZrGwF73rdqNG7mljLlFE39HR8 Qvua1bMhykcpKwSJpb52InbYEFkb09Rn6/AVDSpby9WnDai2wdcn+YFtgZrnYevD e3HoO+X1VrmSRlTxG6yPvPmcYhCZxl7W+duzPYd9Ff4aS4VA24xgfMs5w1dsu3Tt hb/BqMmQ4bSUQqaemj2JpJqVBRlXQc5pkFFtQtdrAO6xWyrQXcjZemzHRBMAmtZP xI8ksD5L9QRbg/KTKcYNFSQ6WVZMBV2dTXWhEycLkGokGDXGCis0BF6IRXTwJNQU 9cLOXtL9hyBBm7tKn199 =wit6 -----END PGP SIGNATURE----- Merge tag 'iommu-fixes-v4.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU fixes from Joerg Roedel: "Three fixes queued up: - fix an issue with command buffer overflow handling in the AMD IOMMU driver - add an additional context entry flush to the Intel VT-d driver to make sure any old context entry from kdump copying is flushed out of the cache - correct the encoding of the PASID table size in the Intel VT-d driver" * tag 'iommu-fixes-v4.10-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/amd: Fix the left value check of cmd buffer iommu/vt-d: Fix pasid table size encoding iommu/vt-d: Flush old iommu caches for kdump when the device gets context mapped
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65cdc405b3
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@ -1023,7 +1023,7 @@ static int __iommu_queue_command_sync(struct amd_iommu *iommu,
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next_tail = (tail + sizeof(*cmd)) % CMD_BUFFER_SIZE;
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left = (head - next_tail) % CMD_BUFFER_SIZE;
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if (left <= 2) {
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if (left <= 0x20) {
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struct iommu_cmd sync_cmd;
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int ret;
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@ -2037,6 +2037,25 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
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if (context_present(context))
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goto out_unlock;
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/*
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* For kdump cases, old valid entries may be cached due to the
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* in-flight DMA and copied pgtable, but there is no unmapping
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* behaviour for them, thus we need an explicit cache flush for
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* the newly-mapped device. For kdump, at this point, the device
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* is supposed to finish reset at its driver probe stage, so no
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* in-flight DMA will exist, and we don't need to worry anymore
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* hereafter.
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*/
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if (context_copied(context)) {
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u16 did_old = context_domain_id(context);
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if (did_old >= 0 && did_old < cap_ndoms(iommu->cap))
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iommu->flush.flush_context(iommu, did_old,
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(((u16)bus) << 8) | devfn,
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DMA_CCMD_MASK_NOBIT,
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DMA_CCMD_DEVICE_INVL);
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}
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pgd = domain->pgd;
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context_clear_entry(context);
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@ -5185,6 +5204,25 @@ static void intel_iommu_remove_device(struct device *dev)
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}
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#ifdef CONFIG_INTEL_IOMMU_SVM
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#define MAX_NR_PASID_BITS (20)
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static inline unsigned long intel_iommu_get_pts(struct intel_iommu *iommu)
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{
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/*
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* Convert ecap_pss to extend context entry pts encoding, also
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* respect the soft pasid_max value set by the iommu.
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* - number of PASID bits = ecap_pss + 1
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* - number of PASID table entries = 2^(pts + 5)
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* Therefore, pts = ecap_pss - 4
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* e.g. KBL ecap_pss = 0x13, PASID has 20 bits, pts = 15
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*/
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if (ecap_pss(iommu->ecap) < 5)
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return 0;
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/* pasid_max is encoded as actual number of entries not the bits */
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return find_first_bit((unsigned long *)&iommu->pasid_max,
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MAX_NR_PASID_BITS) - 5;
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}
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int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct intel_svm_dev *sdev)
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{
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struct device_domain_info *info;
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@ -5217,7 +5255,9 @@ int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct intel_svm_dev *sd
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if (!(ctx_lo & CONTEXT_PASIDE)) {
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context[1].hi = (u64)virt_to_phys(iommu->pasid_state_table);
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context[1].lo = (u64)virt_to_phys(iommu->pasid_table) | ecap_pss(iommu->ecap);
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context[1].lo = (u64)virt_to_phys(iommu->pasid_table) |
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intel_iommu_get_pts(iommu);
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wmb();
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/* CONTEXT_TT_MULTI_LEVEL and CONTEXT_TT_DEV_IOTLB are both
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* extended to permit requests-with-PASID if the PASIDE bit
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