forked from luck/tmp_suning_uos_patched
ARM: S5PV210: Fix clk_get_rate issue with the clk_h100 clock
The clk_h100 clock represents the IMEM clock for the MSYS domain. This clock rate of this clock is always half of the hclk_msys clock. There is an issue when getting the clock rate of the clk_h100 clock (clock get_rate hclk_h100 always returns clock rate that is equal to the hclk_msys clock rate). This patch modifies the following. 1. Moves the definition of the clk_h100 clock into the 'init_clocks' list with the appropriate parent, ctrlbit, enable and ops fields. 2. The name of the clock is changed from 'clk_h100' to 'hclk_imem' to represent more clearly that is represents the IMEM clock in the MSYS domain. 3. The function to get the clock rate of the hclk_imem clock is added. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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6ed91a202b
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@ -155,11 +155,6 @@ static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable)
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return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
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}
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static struct clk clk_h100 = {
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.name = "hclk100",
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.id = -1,
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};
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static struct clk clk_p83 = {
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.name = "pclk83",
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.id = -1,
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@ -171,11 +166,19 @@ static struct clk clk_p66 = {
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};
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static struct clk *sys_clks[] = {
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&clk_h100,
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&clk_p83,
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&clk_p66
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};
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static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk)
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{
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return clk_get_rate(clk->parent) / 2;
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}
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static struct clk_ops clk_hclk_imem_ops = {
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.get_rate = s5pv210_clk_imem_get_rate,
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};
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static struct clk init_clocks_disable[] = {
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{
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.name = "rot",
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@ -326,6 +329,13 @@ static struct clk init_clocks_disable[] = {
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static struct clk init_clocks[] = {
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{
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.name = "hclk_imem",
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.id = -1,
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.parent = &clk_hclk_msys.clk,
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.ctrlbit = (1 << 5),
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.enable = s5pv210_clk_ip0_ctrl,
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.ops = &clk_hclk_imem_ops,
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}, {
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.name = "uart",
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.id = 0,
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.parent = &clk_p66,
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