forked from luck/tmp_suning_uos_patched
Dynamically allocate memory for PCI devices
Instead of using a static table assuming always 2 CPU sockets, allocate space dynamically for Nehalem PCI devs. This patch is part of a series of patches that changes i7core_edac to allow more than 2 sockets and to properly report one memory controller per socket.
This commit is contained in:
Mauro Carvalho Chehab
parent
a55456f344
commit
66607706ce
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@ -192,10 +192,9 @@ struct i7core_channel {
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};
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struct pci_id_descr {
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int dev;
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int func;
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int dev_id;
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struct pci_dev *pdev[NUM_SOCKETS];
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int dev;
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int func;
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int dev_id;
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};
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struct i7core_pvt {
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@ -229,6 +228,17 @@ struct i7core_pvt {
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spinlock_t mce_lock;
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};
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struct i7core_dev {
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struct list_head list;
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int socket;
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struct pci_dev **pdev;
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};
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/* Static vars */
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static LIST_HEAD(i7core_edac_list);
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static DEFINE_MUTEX(i7core_edac_lock);
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/* Device name and register DID (Device ID) */
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struct i7core_dev_info {
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const char *ctl_name; /* name for this device */
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@ -240,7 +250,7 @@ struct i7core_dev_info {
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.func = (function), \
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.dev_id = (device_id)
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struct pci_id_descr pci_devs[] = {
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struct pci_id_descr pci_dev_descr[] = {
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/* Memory controller */
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{ PCI_DESCR(3, 0, PCI_DEVICE_ID_INTEL_I7_MCR) },
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{ PCI_DESCR(3, 1, PCI_DEVICE_ID_INTEL_I7_MC_TAD) },
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@ -275,11 +285,10 @@ struct pci_id_descr pci_devs[] = {
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{ PCI_DESCR(0, 0, PCI_DEVICE_ID_INTEL_I7_NOCORE) },
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};
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#define N_DEVS ARRAY_SIZE(pci_devs)
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#define N_DEVS ARRAY_SIZE(pci_dev_descr)
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/*
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* pci_device_id table for which devices we are looking for
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* This should match the first device at pci_devs table
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*/
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static const struct pci_device_id i7core_pci_tbl[] __devinitdata = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58_HUB_MGMT)},
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@ -288,7 +297,7 @@ static const struct pci_device_id i7core_pci_tbl[] __devinitdata = {
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/* Table of devices attributes supported by this driver */
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static const struct i7core_dev_info i7core_devs[] = {
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static const struct i7core_dev_info i7core_probe_devs[] = {
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{
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.ctl_name = "i7 Core",
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.fsb_mapping_errors = PCI_DEVICE_ID_INTEL_I7_MCR,
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@ -347,21 +356,37 @@ static inline int numcol(u32 col)
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return cols[col & 0x3];
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}
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static struct i7core_dev *get_i7core_dev(int socket)
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{
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struct i7core_dev *i7core_dev;
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list_for_each_entry(i7core_dev, &i7core_edac_list, list) {
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if (i7core_dev->socket == socket)
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return i7core_dev;
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}
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return NULL;
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}
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/****************************************************************************
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Memory check routines
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****************************************************************************/
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static struct pci_dev *get_pdev_slot_func(u8 socket, unsigned slot,
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unsigned func)
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{
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struct i7core_dev *i7core_dev = get_i7core_dev(socket);
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int i;
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if (!i7core_dev)
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return NULL;
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for (i = 0; i < N_DEVS; i++) {
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if (!pci_devs[i].pdev[socket])
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if (!i7core_dev->pdev[i])
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continue;
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if (PCI_SLOT(pci_devs[i].pdev[socket]->devfn) == slot &&
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PCI_FUNC(pci_devs[i].pdev[socket]->devfn) == func) {
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return pci_devs[i].pdev[socket];
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if (PCI_SLOT(i7core_dev->pdev[i]->devfn) == slot &&
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PCI_FUNC(i7core_dev->pdev[i]->devfn) == func) {
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return i7core_dev->pdev[i];
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}
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}
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@ -1153,9 +1178,18 @@ static void i7core_put_devices(void)
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{
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int i, j;
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for (i = 0; i < NUM_SOCKETS; i++)
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for (i = 0; i < NUM_SOCKETS; i++) {
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struct i7core_dev *i7core_dev = get_i7core_dev(i);
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if (!i7core_dev)
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continue;
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for (j = 0; j < N_DEVS; j++)
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pci_dev_put(pci_devs[j].pdev[i]);
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pci_dev_put(i7core_dev->pdev[j]);
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list_del(&i7core_dev->list);
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kfree(i7core_dev->pdev);
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kfree(i7core_dev);
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}
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}
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static void i7core_xeon_pci_fixup(void)
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@ -1168,7 +1202,7 @@ static void i7core_xeon_pci_fixup(void)
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* to detect them
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*/
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pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
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pci_devs[0].dev_id, NULL);
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pci_dev_descr[0].dev_id, NULL);
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if (unlikely(!pdev)) {
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for (i = 0; i < NUM_SOCKETS; i ++)
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pcibios_scan_specific_bus(255-i);
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@ -1183,19 +1217,21 @@ static void i7core_xeon_pci_fixup(void)
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*/
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int i7core_get_onedevice(struct pci_dev **prev, int devno)
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{
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struct i7core_dev *i7core_dev;
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struct pci_dev *pdev = NULL;
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u8 bus = 0;
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u8 socket = 0;
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pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
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pci_devs[devno].dev_id, *prev);
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pci_dev_descr[devno].dev_id, *prev);
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/*
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* On Xeon 55xx, the Intel Quckpath Arch Generic Non-core regs
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* is at addr 8086:2c40, instead of 8086:2c41. So, we need
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* to probe for the alternate address in case of failure
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*/
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if (pci_devs[devno].dev_id == PCI_DEVICE_ID_INTEL_I7_NOCORE && !pdev)
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if (pci_dev_descr[devno].dev_id == PCI_DEVICE_ID_INTEL_I7_NOCORE && !pdev)
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pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_I7_NOCORE_ALT, *prev);
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@ -1209,15 +1245,15 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
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* Dev 3 function 2 only exists on chips with RDIMMs
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* so, it is ok to not found it
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*/
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if ((pci_devs[devno].dev == 3) && (pci_devs[devno].func == 2)) {
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if ((pci_dev_descr[devno].dev == 3) && (pci_dev_descr[devno].func == 2)) {
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*prev = pdev;
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return 0;
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}
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i7core_printk(KERN_ERR,
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"Device not found: dev %02x.%d PCI ID %04x:%04x\n",
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pci_devs[devno].dev, pci_devs[devno].func,
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id);
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pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
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PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
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/* End of list, leave */
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return -ENODEV;
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@ -1229,37 +1265,40 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
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else
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socket = 255 - bus;
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if (socket >= NUM_SOCKETS) {
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i7core_printk(KERN_ERR,
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"Unexpected socket for "
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"dev %02x:%02x.%d PCI ID %04x:%04x\n",
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bus, pci_devs[devno].dev, pci_devs[devno].func,
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id);
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pci_dev_put(pdev);
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return -ENODEV;
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i7core_dev = get_i7core_dev(socket);
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if (!i7core_dev) {
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i7core_dev = kzalloc(sizeof(*i7core_dev), GFP_KERNEL);
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if (!i7core_dev)
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return -ENOMEM;
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i7core_dev->pdev = kzalloc(sizeof(*i7core_dev->pdev) * N_DEVS,
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GFP_KERNEL);
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if (!i7core_dev->pdev)
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return -ENOMEM;
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i7core_dev->socket = socket;
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list_add_tail(&i7core_dev->list, &i7core_edac_list);
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}
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if (pci_devs[devno].pdev[socket]) {
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if (i7core_dev->pdev[devno]) {
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i7core_printk(KERN_ERR,
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"Duplicated device for "
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"dev %02x:%02x.%d PCI ID %04x:%04x\n",
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bus, pci_devs[devno].dev, pci_devs[devno].func,
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id);
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bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
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PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
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pci_dev_put(pdev);
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return -ENODEV;
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}
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pci_devs[devno].pdev[socket] = pdev;
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i7core_dev->pdev[devno] = pdev;
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/* Sanity check */
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if (unlikely(PCI_SLOT(pdev->devfn) != pci_devs[devno].dev ||
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PCI_FUNC(pdev->devfn) != pci_devs[devno].func)) {
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if (unlikely(PCI_SLOT(pdev->devfn) != pci_dev_descr[devno].dev ||
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PCI_FUNC(pdev->devfn) != pci_dev_descr[devno].func)) {
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i7core_printk(KERN_ERR,
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"Device PCI ID %04x:%04x "
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"has dev %02x:%02x.%d instead of dev %02x:%02x.%d\n",
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id,
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PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id,
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bus, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
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bus, pci_devs[devno].dev, pci_devs[devno].func);
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bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func);
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return -ENODEV;
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}
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@ -1268,27 +1307,29 @@ int i7core_get_onedevice(struct pci_dev **prev, int devno)
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i7core_printk(KERN_ERR,
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"Couldn't enable "
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"dev %02x:%02x.%d PCI ID %04x:%04x\n",
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bus, pci_devs[devno].dev, pci_devs[devno].func,
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id);
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bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
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PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
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return -ENODEV;
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}
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i7core_printk(KERN_INFO,
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"Registered socket %d "
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"dev %02x:%02x.%d PCI ID %04x:%04x\n",
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socket, bus, pci_devs[devno].dev, pci_devs[devno].func,
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PCI_VENDOR_ID_INTEL, pci_devs[devno].dev_id);
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socket, bus, pci_dev_descr[devno].dev, pci_dev_descr[devno].func,
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PCI_VENDOR_ID_INTEL, pci_dev_descr[devno].dev_id);
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*prev = pdev;
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return 0;
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}
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static int i7core_get_devices(void)
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static int i7core_get_devices(u8 *sockets)
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{
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int i;
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struct pci_dev *pdev = NULL;
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struct i7core_dev *i7core_dev = NULL;
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*sockets = 0;
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for (i = 0; i < N_DEVS; i++) {
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pdev = NULL;
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do {
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@ -1298,6 +1339,12 @@ static int i7core_get_devices(void)
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}
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} while (pdev);
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}
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list_for_each_entry(i7core_dev, &i7core_edac_list, list) {
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if (i7core_dev->socket + 1 > *sockets)
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*sockets = i7core_dev->socket + 1;
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}
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return 0;
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}
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@ -1307,11 +1354,15 @@ static int mci_bind_devs(struct mem_ctl_info *mci)
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struct pci_dev *pdev;
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int i, j, func, slot;
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for (i = 0; i < pvt->sockets; i++) {
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struct i7core_dev *i7core_dev = get_i7core_dev(i);
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if (!i7core_dev)
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continue;
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pvt->is_registered[i] = 0;
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for (j = 0; j < N_DEVS; j++) {
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pdev = pci_devs[j].pdev[i];
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pdev = i7core_dev->pdev[j];
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if (!pdev)
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continue;
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@ -1723,20 +1774,17 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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int rc, i;
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u8 sockets;
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if (unlikely(dev_idx >= ARRAY_SIZE(i7core_devs)))
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/*
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* FIXME: All memory controllers are allocated at the first pass.
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*/
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if (unlikely(dev_idx >= 1))
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return -EINVAL;
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/* get the pci devices we want to reserve for our use */
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rc = i7core_get_devices();
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mutex_lock(&i7core_edac_lock);
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rc = i7core_get_devices(&sockets);
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if (unlikely(rc < 0))
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return rc;
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sockets = 1;
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for (i = NUM_SOCKETS - 1; i > 0; i--)
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if (pci_devs[0].pdev[i]) {
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sockets = i + 1;
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break;
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}
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goto fail0;
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for (i = 0; i < sockets; i++) {
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int channels;
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@ -1745,7 +1793,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* Check the number of active and not disabled channels */
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rc = i7core_get_active_channels(i, &channels, &csrows);
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if (unlikely(rc < 0))
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goto fail0;
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goto fail1;
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num_channels += channels;
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num_csrows += csrows;
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@ -1755,7 +1803,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);
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if (unlikely(!mci)) {
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rc = -ENOMEM;
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goto fail0;
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goto fail1;
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}
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debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
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@ -1776,7 +1824,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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mci->edac_cap = EDAC_FLAG_NONE;
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mci->mod_name = "i7core_edac.c";
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mci->mod_ver = I7CORE_REVISION;
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mci->ctl_name = i7core_devs[dev_idx].ctl_name;
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mci->ctl_name = i7core_probe_devs[dev_idx].ctl_name;
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mci->dev_name = pci_name(pdev);
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mci->ctl_page_to_phys = NULL;
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mci->mc_driver_sysfs_attributes = i7core_inj_attrs;
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@ -1786,7 +1834,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* Store pci devices at mci for faster access */
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rc = mci_bind_devs(mci);
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if (unlikely(rc < 0))
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goto fail1;
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goto fail2;
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/* Get dimm basic config */
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for (i = 0; i < sockets; i++)
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@ -1801,7 +1849,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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*/
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rc = -EINVAL;
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goto fail1;
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goto fail2;
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}
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/* allocating generic PCI control info */
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@ -1832,18 +1880,21 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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if (unlikely(rc < 0)) {
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debugf0("MC: " __FILE__
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": %s(): failed edac_mce_register()\n", __func__);
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goto fail1;
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goto fail2;
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}
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i7core_printk(KERN_INFO, "Driver loaded.\n");
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mutex_unlock(&i7core_edac_lock);
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return 0;
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fail1:
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fail2:
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edac_mc_free(mci);
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fail0:
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fail1:
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i7core_put_devices();
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fail0:
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mutex_unlock(&i7core_edac_lock);
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return rc;
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}
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@ -1871,7 +1922,9 @@ static void __devexit i7core_remove(struct pci_dev *pdev)
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edac_mce_unregister(&pvt->edac_mce);
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/* retrieve references to resources, and free those resources */
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mutex_lock(&i7core_edac_lock);
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i7core_put_devices();
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mutex_unlock(&i7core_edac_lock);
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edac_mc_free(mci);
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}
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Block a user