forked from luck/tmp_suning_uos_patched
[SCSI] aic79xx: Use struct map_node
Use struct map_node instead of separate variables. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
This commit is contained in:
Hannes Reinecke
James Bottomley
parent
5e46631b04
commit
66a0683e46
@ -37,7 +37,7 @@
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx.h#95 $
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx.h#108 $
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*
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* $FreeBSD$
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*/
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@ -1062,6 +1062,7 @@ struct ahd_softc {
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struct scb_data scb_data;
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struct hardware_scb *next_queued_hscb;
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struct map_node *next_queued_hscb_map;
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/*
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* SCBs that have been sent to the controller
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@ -1140,10 +1141,6 @@ struct ahd_softc {
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ahd_flag flags;
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struct seeprom_config *seep_config;
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/* Values to store in the SEQCTL register for pause and unpause */
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uint8_t unpause;
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uint8_t pause;
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/* Command Queues */
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uint16_t qoutfifonext;
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uint16_t qoutfifonext_valid_tag;
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@ -1151,6 +1148,17 @@ struct ahd_softc {
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uint16_t qinfifo[AHD_SCB_MAX];
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uint16_t *qoutfifo;
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/*
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* Our qfreeze count. The sequencer compares
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* this value with its own counter to determine
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* whether to allow selections to occur.
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*/
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uint16_t qfreeze_cnt;
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/* Values to store in the SEQCTL register for pause and unpause */
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uint8_t unpause;
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uint8_t pause;
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/* Critical Section Data */
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struct cs *critical_sections;
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u_int num_critical_sections;
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@ -1197,8 +1205,7 @@ struct ahd_softc {
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*/
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bus_dma_tag_t parent_dmat;
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bus_dma_tag_t shared_data_dmat;
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bus_dmamap_t shared_data_dmamap;
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dma_addr_t shared_data_busaddr;
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struct map_node shared_data_map;
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/* Information saved through suspend/resume cycles */
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struct ahd_suspend_state suspend_state;
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@ -1296,9 +1303,9 @@ struct ahd_devinfo {
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};
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/****************************** PCI Structures ********************************/
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#define AHD_PCI_IOADDR0 PCIR_MAPS /* I/O BAR*/
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#define AHD_PCI_MEMADDR (PCIR_MAPS + 4) /* Memory BAR */
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#define AHD_PCI_IOADDR1 (PCIR_MAPS + 12)/* Second I/O BAR */
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#define AHD_PCI_IOADDR0 PCIR_BAR(0) /* I/O BAR*/
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#define AHD_PCI_MEMADDR PCIR_BAR(1) /* Memory BAR */
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#define AHD_PCI_IOADDR1 PCIR_BAR(3) /* Second I/O BAR */
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typedef int (ahd_device_setup_t)(struct ahd_softc *);
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@ -5203,13 +5203,13 @@ ahd_free(struct ahd_softc *ahd)
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/* FALLTHROUGH */
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case 4:
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ahd_dmamap_unload(ahd, ahd->shared_data_dmat,
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ahd->shared_data_dmamap);
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ahd->shared_data_map.dmamap);
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/* FALLTHROUGH */
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case 3:
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ahd_dmamem_free(ahd, ahd->shared_data_dmat, ahd->qoutfifo,
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ahd->shared_data_dmamap);
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ahd->shared_data_map.dmamap);
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ahd_dmamap_destroy(ahd, ahd->shared_data_dmat,
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ahd->shared_data_dmamap);
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ahd->shared_data_map.dmamap);
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/* FALLTHROUGH */
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case 2:
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ahd_dma_tag_destroy(ahd, ahd->shared_data_dmat);
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@ -6088,7 +6088,6 @@ static const char *termstat_strings[] = {
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int
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ahd_init(struct ahd_softc *ahd)
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{
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uint8_t *base_vaddr;
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uint8_t *next_vaddr;
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dma_addr_t next_baddr;
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size_t driver_data_size;
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@ -6178,20 +6177,23 @@ ahd_init(struct ahd_softc *ahd)
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/* Allocation of driver data */
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if (ahd_dmamem_alloc(ahd, ahd->shared_data_dmat,
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(void **)&base_vaddr,
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BUS_DMA_NOWAIT, &ahd->shared_data_dmamap) != 0) {
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(void **)&ahd->shared_data_map.vaddr,
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BUS_DMA_NOWAIT,
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&ahd->shared_data_map.dmamap) != 0) {
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return (ENOMEM);
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}
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ahd->init_level++;
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/* And permanently map it in */
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ahd_dmamap_load(ahd, ahd->shared_data_dmat, ahd->shared_data_dmamap,
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base_vaddr, driver_data_size, ahd_dmamap_cb,
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&ahd->shared_data_busaddr, /*flags*/0);
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ahd->qoutfifo = (uint16_t *)base_vaddr;
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ahd_dmamap_load(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
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ahd->shared_data_map.vaddr, driver_data_size,
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ahd_dmamap_cb, &ahd->shared_data_map.physaddr,
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/*flags*/0);
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ahd->qoutfifo = (uint16_t *)ahd->shared_data_map.vaddr;
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next_vaddr = (uint8_t *)&ahd->qoutfifo[AHD_QOUT_SIZE];
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next_baddr = ahd->shared_data_busaddr + AHD_QOUT_SIZE*sizeof(uint16_t);
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next_baddr = ahd->shared_data_map.physaddr
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+ AHD_QOUT_SIZE*sizeof(uint16_t);
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if ((ahd->features & AHD_TARGETMODE) != 0) {
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ahd->targetcmds = (struct target_cmd *)next_vaddr;
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next_vaddr += AHD_TMODE_CMDS * sizeof(struct target_cmd);
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@ -6212,6 +6214,7 @@ ahd_init(struct ahd_softc *ahd)
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* specially from the DMA safe memory chunk used for the QOUTFIFO.
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*/
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ahd->next_queued_hscb = (struct hardware_scb *)next_vaddr;
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ahd->next_queued_hscb_map = &ahd->shared_data_map;
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ahd->next_queued_hscb->hscb_busaddr = ahd_htole32(next_baddr);
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ahd->init_level++;
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@ -6557,12 +6560,13 @@ ahd_chip_init(struct ahd_softc *ahd)
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/*
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* The Freeze Count is 0.
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*/
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ahd->qfreeze_cnt = 0;
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ahd_outw(ahd, QFREEZE_COUNT, 0);
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/*
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* Tell the sequencer where it can find our arrays in memory.
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*/
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busaddr = ahd->shared_data_busaddr;
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busaddr = ahd->shared_data_map.physaddr;
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ahd_outb(ahd, SHARED_DATA_ADDR, busaddr & 0xFF);
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ahd_outb(ahd, SHARED_DATA_ADDR + 1, (busaddr >> 8) & 0xFF);
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ahd_outb(ahd, SHARED_DATA_ADDR + 2, (busaddr >> 16) & 0xFF);
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@ -9651,7 +9655,7 @@ ahd_run_tqinfifo(struct ahd_softc *ahd, int paused)
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cmd->cmd_valid = 0;
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
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ahd->shared_data_dmamap,
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ahd->shared_data_map.dmamap,
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ahd_targetcmd_offset(ahd, ahd->tqinfifonext),
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sizeof(struct target_cmd),
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BUS_DMASYNC_PREREAD);
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@ -37,7 +37,7 @@
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#51 $
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* $Id: //depot/aic7xxx/aic7xxx/aic79xx_inline.h#58 $
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*
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* $FreeBSD$
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*/
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@ -522,12 +522,21 @@ do { \
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static __inline uint16_t
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ahd_inw(struct ahd_softc *ahd, u_int port)
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{
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/*
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* Read high byte first as some registers increment
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* or have other side effects when the low byte is
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* read.
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*/
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return ((ahd_inb(ahd, port+1) << 8) | ahd_inb(ahd, port));
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}
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static __inline void
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ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
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{
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/*
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* Write low byte first to accomodate registers
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* such as PRGMCNT where the order maters.
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*/
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ahd_outb(ahd, port, value & 0xFF);
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ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
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}
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@ -684,7 +693,7 @@ ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
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* Razor #528
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*/
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value = ahd_inb(ahd, offset);
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if ((ahd->flags & AHD_PCIX_SCBRAM_RD_BUG) != 0)
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if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0)
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ahd_inb(ahd, MODE_PTR);
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return (value);
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}
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@ -727,7 +736,8 @@ ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
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static __inline void
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ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
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{
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struct hardware_scb *q_hscb;
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struct hardware_scb *q_hscb;
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struct map_node *q_hscb_map;
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uint32_t saved_hscb_busaddr;
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/*
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@ -743,6 +753,7 @@ ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
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* locate the correct SCB by SCB_TAG.
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*/
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q_hscb = ahd->next_queued_hscb;
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q_hscb_map = ahd->next_queued_hscb_map;
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saved_hscb_busaddr = q_hscb->hscb_busaddr;
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memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
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q_hscb->hscb_busaddr = saved_hscb_busaddr;
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@ -750,7 +761,9 @@ ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
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/* Now swap HSCB pointers. */
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ahd->next_queued_hscb = scb->hscb;
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ahd->next_queued_hscb_map = scb->hscb_map;
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scb->hscb = q_hscb;
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scb->hscb_map = q_hscb_map;
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/* Now define the mapping from tag to SCB in the scbindex */
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ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
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@ -824,8 +837,9 @@ static __inline int ahd_intr(struct ahd_softc *ahd);
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static __inline void
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ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
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{
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_dmamap,
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/*offset*/0, /*len*/AHC_SCB_MAX * sizeof(uint16_t), op);
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
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/*offset*/0,
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/*len*/AHD_SCB_MAX * sizeof(uint16_t), op);
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}
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static __inline void
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@ -834,7 +848,7 @@ ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
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#ifdef AHD_TARGET_MODE
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if ((ahd->flags & AHD_TARGETROLE) != 0) {
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
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ahd->shared_data_dmamap,
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ahd->shared_data_map.dmamap,
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ahd_targetcmd_offset(ahd, 0),
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sizeof(struct target_cmd) * AHD_TMODE_CMDS,
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op);
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@ -854,9 +868,9 @@ ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
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u_int retval;
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retval = 0;
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_dmamap,
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/*offset*/ahd->qoutfifonext, /*len*/2,
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BUS_DMASYNC_POSTREAD);
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
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/*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
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/*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
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if ((ahd->qoutfifo[ahd->qoutfifonext]
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& QOUTFIFO_ENTRY_VALID_LE) == ahd->qoutfifonext_valid_tag)
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retval |= AHD_RUN_QOUTFIFO;
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@ -864,7 +878,7 @@ ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
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if ((ahd->flags & AHD_TARGETROLE) != 0
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&& (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
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ahd_dmamap_sync(ahd, ahd->shared_data_dmat,
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ahd->shared_data_dmamap,
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ahd->shared_data_map.dmamap,
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ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
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/*len*/sizeof(struct target_cmd),
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BUS_DMASYNC_POSTREAD);
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