forked from luck/tmp_suning_uos_patched
soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
This provides a free software alternative to raspberrypi-power.c's firmware calls to manage power domains. It also exposes a reset line, where previously the vc4 driver had to try to force power off the domain in order to trigger a reset. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
This commit is contained in:
Eric Anholt
Stefan Wahren
parent
5e6acc3e67
commit
670c672608
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@ -3,7 +3,7 @@
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* PM MFD driver for Broadcom BCM2835
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*
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* This driver binds to the PM block and creates the MFD device for
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* the WDT driver.
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* the WDT and power drivers.
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*/
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#include <linux/delay.h>
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@ -21,11 +21,16 @@ static const struct mfd_cell bcm2835_pm_devs[] = {
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{ .name = "bcm2835-wdt" },
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};
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static const struct mfd_cell bcm2835_power_devs[] = {
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{ .name = "bcm2835-power" },
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};
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static int bcm2835_pm_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct device *dev = &pdev->dev;
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struct bcm2835_pm *pm;
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int ret;
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pm = devm_kzalloc(dev, sizeof(*pm), GFP_KERNEL);
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if (!pm)
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@ -39,13 +44,36 @@ static int bcm2835_pm_probe(struct platform_device *pdev)
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if (IS_ERR(pm->base))
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return PTR_ERR(pm->base);
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return devm_mfd_add_devices(dev, -1,
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ret = devm_mfd_add_devices(dev, -1,
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bcm2835_pm_devs, ARRAY_SIZE(bcm2835_pm_devs),
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NULL, 0, NULL);
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if (ret)
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return ret;
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/* We'll use the presence of the AXI ASB regs in the
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* bcm2835-pm binding as the key for whether we can reference
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* the full PM register range and support power domains.
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*/
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (res) {
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pm->asb = devm_ioremap_resource(dev, res);
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if (IS_ERR(pm->asb))
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return PTR_ERR(pm->asb);
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ret = devm_mfd_add_devices(dev, -1,
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bcm2835_power_devs,
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ARRAY_SIZE(bcm2835_power_devs),
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NULL, 0, NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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static const struct of_device_id bcm2835_pm_of_match[] = {
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{ .compatible = "brcm,bcm2835-pm-wdt", },
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{ .compatible = "brcm,bcm2835-pm", },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm2835_pm_of_match);
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@ -1,5 +1,16 @@
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menu "Broadcom SoC drivers"
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config BCM2835_POWER
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bool "BCM2835 power domain driver"
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depends on ARCH_BCM2835 || (COMPILE_TEST && OF)
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select PM_GENERIC_DOMAINS if PM
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select RESET_CONTROLLER
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help
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This enables support for the BCM2835 power domains and reset
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controller. Any usage of power domains by the Raspberry Pi
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firmware means that Linux usage of the same power domain
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must be accessed using the RASPBERRYPI_POWER driver
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config RASPBERRYPI_POWER
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bool "Raspberry Pi power domain driver"
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depends on ARCH_BCM2835 || (COMPILE_TEST && OF)
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@ -1,2 +1,3 @@
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obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o
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obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
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obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
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661
drivers/soc/bcm/bcm2835-power.c
Normal file
661
drivers/soc/bcm/bcm2835-power.c
Normal file
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@ -0,0 +1,661 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Power domain driver for Broadcom BCM2835
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*
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* Copyright (C) 2018 Broadcom
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*/
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#include <dt-bindings/soc/bcm2835-pm.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/mfd/bcm2835-pm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/reset-controller.h>
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#include <linux/types.h>
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#define PM_GNRIC 0x00
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#define PM_AUDIO 0x04
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#define PM_STATUS 0x18
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#define PM_RSTC 0x1c
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#define PM_RSTS 0x20
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#define PM_WDOG 0x24
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#define PM_PADS0 0x28
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#define PM_PADS2 0x2c
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#define PM_PADS3 0x30
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#define PM_PADS4 0x34
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#define PM_PADS5 0x38
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#define PM_PADS6 0x3c
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#define PM_CAM0 0x44
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#define PM_CAM0_LDOHPEN BIT(2)
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#define PM_CAM0_LDOLPEN BIT(1)
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#define PM_CAM0_CTRLEN BIT(0)
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#define PM_CAM1 0x48
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#define PM_CAM1_LDOHPEN BIT(2)
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#define PM_CAM1_LDOLPEN BIT(1)
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#define PM_CAM1_CTRLEN BIT(0)
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#define PM_CCP2TX 0x4c
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#define PM_CCP2TX_LDOEN BIT(1)
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#define PM_CCP2TX_CTRLEN BIT(0)
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#define PM_DSI0 0x50
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#define PM_DSI0_LDOHPEN BIT(2)
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#define PM_DSI0_LDOLPEN BIT(1)
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#define PM_DSI0_CTRLEN BIT(0)
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#define PM_DSI1 0x54
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#define PM_DSI1_LDOHPEN BIT(2)
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#define PM_DSI1_LDOLPEN BIT(1)
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#define PM_DSI1_CTRLEN BIT(0)
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#define PM_HDMI 0x58
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#define PM_HDMI_RSTDR BIT(19)
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#define PM_HDMI_LDOPD BIT(1)
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#define PM_HDMI_CTRLEN BIT(0)
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#define PM_USB 0x5c
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/* The power gates must be enabled with this bit before enabling the LDO in the
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* USB block.
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*/
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#define PM_USB_CTRLEN BIT(0)
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#define PM_PXLDO 0x60
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#define PM_PXBG 0x64
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#define PM_DFT 0x68
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#define PM_SMPS 0x6c
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#define PM_XOSC 0x70
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#define PM_SPAREW 0x74
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#define PM_SPARER 0x78
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#define PM_AVS_RSTDR 0x7c
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#define PM_AVS_STAT 0x80
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#define PM_AVS_EVENT 0x84
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#define PM_AVS_INTEN 0x88
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#define PM_DUMMY 0xfc
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#define PM_IMAGE 0x108
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#define PM_GRAFX 0x10c
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#define PM_PROC 0x110
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#define PM_ENAB BIT(12)
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#define PM_ISPRSTN BIT(8)
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#define PM_H264RSTN BIT(7)
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#define PM_PERIRSTN BIT(6)
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#define PM_V3DRSTN BIT(6)
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#define PM_ISFUNC BIT(5)
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#define PM_MRDONE BIT(4)
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#define PM_MEMREP BIT(3)
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#define PM_ISPOW BIT(2)
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#define PM_POWOK BIT(1)
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#define PM_POWUP BIT(0)
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#define PM_INRUSH_SHIFT 13
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#define PM_INRUSH_3_5_MA 0
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#define PM_INRUSH_5_MA 1
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#define PM_INRUSH_10_MA 2
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#define PM_INRUSH_20_MA 3
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#define PM_INRUSH_MASK (3 << PM_INRUSH_SHIFT)
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#define PM_PASSWORD 0x5a000000
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#define PM_WDOG_TIME_SET 0x000fffff
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#define PM_RSTC_WRCFG_CLR 0xffffffcf
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#define PM_RSTS_HADWRH_SET 0x00000040
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#define PM_RSTC_WRCFG_SET 0x00000030
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#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
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#define PM_RSTC_RESET 0x00000102
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#define PM_READ(reg) readl(power->base + (reg))
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#define PM_WRITE(reg, val) writel(PM_PASSWORD | (val), power->base + (reg))
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#define ASB_BRDG_VERSION 0x00
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#define ASB_CPR_CTRL 0x04
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#define ASB_V3D_S_CTRL 0x08
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#define ASB_V3D_M_CTRL 0x0c
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#define ASB_ISP_S_CTRL 0x10
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#define ASB_ISP_M_CTRL 0x14
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#define ASB_H264_S_CTRL 0x18
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#define ASB_H264_M_CTRL 0x1c
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#define ASB_REQ_STOP BIT(0)
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#define ASB_ACK BIT(1)
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#define ASB_EMPTY BIT(2)
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#define ASB_FULL BIT(3)
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#define ASB_AXI_BRDG_ID 0x20
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#define ASB_READ(reg) readl(power->asb + (reg))
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#define ASB_WRITE(reg, val) writel(PM_PASSWORD | (val), power->asb + (reg))
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struct bcm2835_power_domain {
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struct generic_pm_domain base;
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struct bcm2835_power *power;
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u32 domain;
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struct clk *clk;
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};
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struct bcm2835_power {
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struct device *dev;
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/* PM registers. */
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void __iomem *base;
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/* AXI Async bridge registers. */
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void __iomem *asb;
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struct genpd_onecell_data pd_xlate;
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struct bcm2835_power_domain domains[BCM2835_POWER_DOMAIN_COUNT];
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struct reset_controller_dev reset;
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};
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static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg)
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{
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u64 start = ktime_get_ns();
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/* Enable the module's async AXI bridges. */
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ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP);
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while (ASB_READ(reg) & ASB_ACK) {
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cpu_relax();
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if (ktime_get_ns() - start >= 1000)
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg)
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{
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u64 start = ktime_get_ns();
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/* Enable the module's async AXI bridges. */
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ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP);
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while (!(ASB_READ(reg) & ASB_ACK)) {
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cpu_relax();
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if (ktime_get_ns() - start >= 1000)
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int bcm2835_power_power_off(struct bcm2835_power_domain *pd, u32 pm_reg)
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{
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struct bcm2835_power *power = pd->power;
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/* Enable functional isolation */
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISFUNC);
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/* Enable electrical isolation */
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW);
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/* Open the power switches. */
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_POWUP);
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return 0;
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}
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static int bcm2835_power_power_on(struct bcm2835_power_domain *pd, u32 pm_reg)
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{
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struct bcm2835_power *power = pd->power;
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struct device *dev = power->dev;
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u64 start;
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int ret;
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int inrush;
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bool powok;
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/* If it was already powered on by the fw, leave it that way. */
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if (PM_READ(pm_reg) & PM_POWUP)
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return 0;
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/* Enable power. Allowing too much current at once may result
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* in POWOK never getting set, so start low and ramp it up as
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* necessary to succeed.
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*/
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powok = false;
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for (inrush = PM_INRUSH_3_5_MA; inrush <= PM_INRUSH_20_MA; inrush++) {
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PM_WRITE(pm_reg,
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(PM_READ(pm_reg) & ~PM_INRUSH_MASK) |
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(inrush << PM_INRUSH_SHIFT) |
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PM_POWUP);
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start = ktime_get_ns();
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while (!(powok = !!(PM_READ(pm_reg) & PM_POWOK))) {
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cpu_relax();
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if (ktime_get_ns() - start >= 3000)
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break;
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}
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}
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if (!powok) {
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dev_err(dev, "Timeout waiting for %s power OK\n",
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pd->base.name);
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ret = -ETIMEDOUT;
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goto err_disable_powup;
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}
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/* Disable electrical isolation */
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISPOW);
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/* Repair memory */
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_MEMREP);
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start = ktime_get_ns();
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while (!(PM_READ(pm_reg) & PM_MRDONE)) {
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cpu_relax();
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if (ktime_get_ns() - start >= 1000) {
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dev_err(dev, "Timeout waiting for %s memory repair\n",
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pd->base.name);
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ret = -ETIMEDOUT;
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goto err_disable_ispow;
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}
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}
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/* Disable functional isolation */
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PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISFUNC);
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return 0;
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err_disable_ispow:
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW);
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err_disable_powup:
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~(PM_POWUP | PM_INRUSH_MASK));
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return ret;
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}
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static int bcm2835_asb_power_on(struct bcm2835_power_domain *pd,
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u32 pm_reg,
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u32 asb_m_reg,
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u32 asb_s_reg,
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u32 reset_flags)
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{
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struct bcm2835_power *power = pd->power;
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int ret;
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ret = clk_prepare_enable(pd->clk);
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if (ret) {
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dev_err(power->dev, "Failed to enable clock for %s\n",
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pd->base.name);
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return ret;
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}
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/* Wait 32 clocks for reset to propagate, 1 us will be enough */
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udelay(1);
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clk_disable_unprepare(pd->clk);
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/* Deassert the resets. */
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PM_WRITE(pm_reg, PM_READ(pm_reg) | reset_flags);
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ret = clk_prepare_enable(pd->clk);
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if (ret) {
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dev_err(power->dev, "Failed to enable clock for %s\n",
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pd->base.name);
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goto err_enable_resets;
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}
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ret = bcm2835_asb_enable(power, asb_m_reg);
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if (ret) {
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dev_err(power->dev, "Failed to enable ASB master for %s\n",
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pd->base.name);
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goto err_disable_clk;
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}
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ret = bcm2835_asb_enable(power, asb_s_reg);
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if (ret) {
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dev_err(power->dev, "Failed to enable ASB slave for %s\n",
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pd->base.name);
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goto err_disable_asb_master;
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}
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return 0;
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err_disable_asb_master:
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bcm2835_asb_disable(power, asb_m_reg);
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err_disable_clk:
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clk_disable_unprepare(pd->clk);
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err_enable_resets:
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags);
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return ret;
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}
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static int bcm2835_asb_power_off(struct bcm2835_power_domain *pd,
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u32 pm_reg,
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u32 asb_m_reg,
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u32 asb_s_reg,
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u32 reset_flags)
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{
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struct bcm2835_power *power = pd->power;
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int ret;
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ret = bcm2835_asb_disable(power, asb_s_reg);
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if (ret) {
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dev_warn(power->dev, "Failed to disable ASB slave for %s\n",
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pd->base.name);
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return ret;
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}
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ret = bcm2835_asb_disable(power, asb_m_reg);
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if (ret) {
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dev_warn(power->dev, "Failed to disable ASB master for %s\n",
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pd->base.name);
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bcm2835_asb_enable(power, asb_s_reg);
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return ret;
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}
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clk_disable_unprepare(pd->clk);
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/* Assert the resets. */
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PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags);
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return 0;
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}
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static int bcm2835_power_pd_power_on(struct generic_pm_domain *domain)
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{
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struct bcm2835_power_domain *pd =
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container_of(domain, struct bcm2835_power_domain, base);
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struct bcm2835_power *power = pd->power;
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switch (pd->domain) {
|
||||
case BCM2835_POWER_DOMAIN_GRAFX:
|
||||
return bcm2835_power_power_on(pd, PM_GRAFX);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_GRAFX_V3D:
|
||||
return bcm2835_asb_power_on(pd, PM_GRAFX,
|
||||
ASB_V3D_M_CTRL, ASB_V3D_S_CTRL,
|
||||
PM_V3DRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE:
|
||||
return bcm2835_power_power_on(pd, PM_IMAGE);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_PERI:
|
||||
return bcm2835_asb_power_on(pd, PM_IMAGE,
|
||||
0, 0,
|
||||
PM_PERIRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_ISP:
|
||||
return bcm2835_asb_power_on(pd, PM_IMAGE,
|
||||
ASB_ISP_M_CTRL, ASB_ISP_S_CTRL,
|
||||
PM_ISPRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_H264:
|
||||
return bcm2835_asb_power_on(pd, PM_IMAGE,
|
||||
ASB_H264_M_CTRL, ASB_H264_S_CTRL,
|
||||
PM_H264RSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_USB:
|
||||
PM_WRITE(PM_USB, PM_USB_CTRLEN);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_DSI0:
|
||||
PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN);
|
||||
PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN | PM_DSI0_LDOHPEN);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_DSI1:
|
||||
PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN);
|
||||
PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN | PM_DSI1_LDOHPEN);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_CCP2TX:
|
||||
PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN);
|
||||
PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN | PM_CCP2TX_LDOEN);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_HDMI:
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_RSTDR);
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_CTRLEN);
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_LDOPD);
|
||||
usleep_range(100, 200);
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_RSTDR);
|
||||
return 0;
|
||||
|
||||
default:
|
||||
dev_err(power->dev, "Invalid domain %d\n", pd->domain);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int bcm2835_power_pd_power_off(struct generic_pm_domain *domain)
|
||||
{
|
||||
struct bcm2835_power_domain *pd =
|
||||
container_of(domain, struct bcm2835_power_domain, base);
|
||||
struct bcm2835_power *power = pd->power;
|
||||
|
||||
switch (pd->domain) {
|
||||
case BCM2835_POWER_DOMAIN_GRAFX:
|
||||
return bcm2835_power_power_off(pd, PM_GRAFX);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_GRAFX_V3D:
|
||||
return bcm2835_asb_power_off(pd, PM_GRAFX,
|
||||
ASB_V3D_M_CTRL, ASB_V3D_S_CTRL,
|
||||
PM_V3DRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE:
|
||||
return bcm2835_power_power_off(pd, PM_IMAGE);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_PERI:
|
||||
return bcm2835_asb_power_off(pd, PM_IMAGE,
|
||||
0, 0,
|
||||
PM_PERIRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_ISP:
|
||||
return bcm2835_asb_power_off(pd, PM_IMAGE,
|
||||
ASB_ISP_M_CTRL, ASB_ISP_S_CTRL,
|
||||
PM_ISPRSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_IMAGE_H264:
|
||||
return bcm2835_asb_power_off(pd, PM_IMAGE,
|
||||
ASB_H264_M_CTRL, ASB_H264_S_CTRL,
|
||||
PM_H264RSTN);
|
||||
|
||||
case BCM2835_POWER_DOMAIN_USB:
|
||||
PM_WRITE(PM_USB, 0);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_DSI0:
|
||||
PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN);
|
||||
PM_WRITE(PM_DSI0, 0);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_DSI1:
|
||||
PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN);
|
||||
PM_WRITE(PM_DSI1, 0);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_CCP2TX:
|
||||
PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN);
|
||||
PM_WRITE(PM_CCP2TX, 0);
|
||||
return 0;
|
||||
|
||||
case BCM2835_POWER_DOMAIN_HDMI:
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_LDOPD);
|
||||
PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_CTRLEN);
|
||||
return 0;
|
||||
|
||||
default:
|
||||
dev_err(power->dev, "Invalid domain %d\n", pd->domain);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
bcm2835_init_power_domain(struct bcm2835_power *power,
|
||||
int pd_xlate_index, const char *name)
|
||||
{
|
||||
struct device *dev = power->dev;
|
||||
struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index];
|
||||
|
||||
dom->clk = devm_clk_get(dev->parent, name);
|
||||
|
||||
dom->base.name = name;
|
||||
dom->base.power_on = bcm2835_power_pd_power_on;
|
||||
dom->base.power_off = bcm2835_power_pd_power_off;
|
||||
|
||||
dom->domain = pd_xlate_index;
|
||||
dom->power = power;
|
||||
|
||||
/* XXX: on/off at boot? */
|
||||
pm_genpd_init(&dom->base, NULL, true);
|
||||
|
||||
power->pd_xlate.domains[pd_xlate_index] = &dom->base;
|
||||
}
|
||||
|
||||
/** bcm2835_reset_reset - Resets a block that has a reset line in the
|
||||
* PM block.
|
||||
*
|
||||
* The consumer of the reset controller must have the power domain up
|
||||
* -- there's no reset ability with the power domain down. To reset
|
||||
* the sub-block, we just disable its access to memory through the
|
||||
* ASB, reset, and re-enable.
|
||||
*/
|
||||
static int bcm2835_reset_reset(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
{
|
||||
struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power,
|
||||
reset);
|
||||
struct bcm2835_power_domain *pd;
|
||||
int ret;
|
||||
|
||||
switch (id) {
|
||||
case BCM2835_RESET_V3D:
|
||||
pd = &power->domains[BCM2835_POWER_DOMAIN_GRAFX_V3D];
|
||||
break;
|
||||
case BCM2835_RESET_H264:
|
||||
pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_H264];
|
||||
break;
|
||||
case BCM2835_RESET_ISP:
|
||||
pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_ISP];
|
||||
break;
|
||||
default:
|
||||
dev_err(power->dev, "Bad reset id %ld\n", id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = bcm2835_power_pd_power_off(&pd->base);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return bcm2835_power_pd_power_on(&pd->base);
|
||||
}
|
||||
|
||||
static int bcm2835_reset_status(struct reset_controller_dev *rcdev,
|
||||
unsigned long id)
|
||||
{
|
||||
struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power,
|
||||
reset);
|
||||
|
||||
switch (id) {
|
||||
case BCM2835_RESET_V3D:
|
||||
return !PM_READ(PM_GRAFX & PM_V3DRSTN);
|
||||
case BCM2835_RESET_H264:
|
||||
return !PM_READ(PM_IMAGE & PM_H264RSTN);
|
||||
case BCM2835_RESET_ISP:
|
||||
return !PM_READ(PM_IMAGE & PM_ISPRSTN);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
const struct reset_control_ops bcm2835_reset_ops = {
|
||||
.reset = bcm2835_reset_reset,
|
||||
.status = bcm2835_reset_status,
|
||||
};
|
||||
|
||||
static const char *const power_domain_names[] = {
|
||||
[BCM2835_POWER_DOMAIN_GRAFX] = "grafx",
|
||||
[BCM2835_POWER_DOMAIN_GRAFX_V3D] = "v3d",
|
||||
|
||||
[BCM2835_POWER_DOMAIN_IMAGE] = "image",
|
||||
[BCM2835_POWER_DOMAIN_IMAGE_PERI] = "peri_image",
|
||||
[BCM2835_POWER_DOMAIN_IMAGE_H264] = "h264",
|
||||
[BCM2835_POWER_DOMAIN_IMAGE_ISP] = "isp",
|
||||
|
||||
[BCM2835_POWER_DOMAIN_USB] = "usb",
|
||||
[BCM2835_POWER_DOMAIN_DSI0] = "dsi0",
|
||||
[BCM2835_POWER_DOMAIN_DSI1] = "dsi1",
|
||||
[BCM2835_POWER_DOMAIN_CAM0] = "cam0",
|
||||
[BCM2835_POWER_DOMAIN_CAM1] = "cam1",
|
||||
[BCM2835_POWER_DOMAIN_CCP2TX] = "ccp2tx",
|
||||
[BCM2835_POWER_DOMAIN_HDMI] = "hdmi",
|
||||
};
|
||||
|
||||
static int bcm2835_power_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
|
||||
struct device *dev = &pdev->dev;
|
||||
struct bcm2835_power *power;
|
||||
static const struct {
|
||||
int parent, child;
|
||||
} domain_deps[] = {
|
||||
{ BCM2835_POWER_DOMAIN_GRAFX, BCM2835_POWER_DOMAIN_GRAFX_V3D },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_PERI },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_H264 },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_ISP },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_USB },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 },
|
||||
{ BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 },
|
||||
};
|
||||
int ret, i;
|
||||
u32 id;
|
||||
|
||||
power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL);
|
||||
if (!power)
|
||||
return -ENOMEM;
|
||||
platform_set_drvdata(pdev, power);
|
||||
|
||||
power->dev = dev;
|
||||
power->base = pm->base;
|
||||
power->asb = pm->asb;
|
||||
|
||||
id = ASB_READ(ASB_AXI_BRDG_ID);
|
||||
if (id != 0x62726467 /* "BRDG" */) {
|
||||
dev_err(dev, "ASB register ID returned 0x%08x\n", id);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
power->pd_xlate.domains = devm_kcalloc(dev,
|
||||
ARRAY_SIZE(power_domain_names),
|
||||
sizeof(*power->pd_xlate.domains),
|
||||
GFP_KERNEL);
|
||||
if (!power->pd_xlate.domains)
|
||||
return -ENOMEM;
|
||||
|
||||
power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(power_domain_names); i++)
|
||||
bcm2835_init_power_domain(power, i, power_domain_names[i]);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(domain_deps); i++) {
|
||||
pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base,
|
||||
&power->domains[domain_deps[i].child].base);
|
||||
}
|
||||
|
||||
power->reset.owner = THIS_MODULE;
|
||||
power->reset.nr_resets = BCM2835_RESET_COUNT;
|
||||
power->reset.ops = &bcm2835_reset_ops;
|
||||
power->reset.of_node = dev->parent->of_node;
|
||||
|
||||
ret = devm_reset_controller_register(dev, &power->reset);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate);
|
||||
|
||||
dev_info(dev, "Broadcom BCM2835 power domains driver");
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm2835_power_remove(struct platform_device *pdev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver bcm2835_power_driver = {
|
||||
.probe = bcm2835_power_probe,
|
||||
.remove = bcm2835_power_remove,
|
||||
.driver = {
|
||||
.name = "bcm2835-power",
|
||||
},
|
||||
};
|
||||
module_platform_driver(bcm2835_power_driver);
|
||||
|
||||
MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
|
||||
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM power domains and reset");
|
||||
MODULE_LICENSE("GPL");
|
||||
28
include/dt-bindings/soc/bcm2835-pm.h
Normal file
28
include/dt-bindings/soc/bcm2835-pm.h
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
|
||||
|
||||
#ifndef _DT_BINDINGS_ARM_BCM2835_PM_H
|
||||
#define _DT_BINDINGS_ARM_BCM2835_PM_H
|
||||
|
||||
#define BCM2835_POWER_DOMAIN_GRAFX 0
|
||||
#define BCM2835_POWER_DOMAIN_GRAFX_V3D 1
|
||||
#define BCM2835_POWER_DOMAIN_IMAGE 2
|
||||
#define BCM2835_POWER_DOMAIN_IMAGE_PERI 3
|
||||
#define BCM2835_POWER_DOMAIN_IMAGE_ISP 4
|
||||
#define BCM2835_POWER_DOMAIN_IMAGE_H264 5
|
||||
#define BCM2835_POWER_DOMAIN_USB 6
|
||||
#define BCM2835_POWER_DOMAIN_DSI0 7
|
||||
#define BCM2835_POWER_DOMAIN_DSI1 8
|
||||
#define BCM2835_POWER_DOMAIN_CAM0 9
|
||||
#define BCM2835_POWER_DOMAIN_CAM1 10
|
||||
#define BCM2835_POWER_DOMAIN_CCP2TX 11
|
||||
#define BCM2835_POWER_DOMAIN_HDMI 12
|
||||
|
||||
#define BCM2835_POWER_DOMAIN_COUNT 13
|
||||
|
||||
#define BCM2835_RESET_V3D 0
|
||||
#define BCM2835_RESET_ISP 1
|
||||
#define BCM2835_RESET_H264 2
|
||||
|
||||
#define BCM2835_RESET_COUNT 3
|
||||
|
||||
#endif /* _DT_BINDINGS_ARM_BCM2835_PM_H */
|
||||
|
|
@ -8,6 +8,7 @@
|
|||
struct bcm2835_pm {
|
||||
struct device *dev;
|
||||
void __iomem *base;
|
||||
void __iomem *asb;
|
||||
};
|
||||
|
||||
#endif /* BCM2835_MFD_PM_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user